| Run: | explore-bc8218b282-20261015-075519 |
| Kind: | fallback |
| Category: | legalize: G_INTRINSIC <4 x s16>,s32 |
| Occurrences: | 11 in 1 configs, 1 test files |
| Snippet from: | rvp-simd-64.ll @test_psll_s_u16x4 via llvm-extract |
| Config: | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| Local check: | reproduces at bc8218b282 |
| Compiler Explorer: | not uploaded (over --godbolt-limit or disabled) |
define <4 x i16> @test_psll_s_u16x4(<4 x i16> %a, i32 %shamt) {
%res = call <4 x i16> @llvm.riscv.psll.v4i16(<4 x i16> %a, i32 %shamt)
ret <4 x i16> %res
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i16> @llvm.riscv.psll.v4i16(<4 x i16>, i32) #0
attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o - llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -
remark: <unknown>:0:0: unable to legalize instruction: %3:_(<4 x s16>) = G_INTRINSIC intrinsic(@llvm.riscv.psll), %0:_(<4 x s16>), %1:_(s32) (in function: test_psll_s_u16x4) warning: Instruction selection used fallback path for test_psll_s_u16x4
| Input | Function | Config |
|---|---|---|
| rvp-simd-64.ll | test_psll_s_u16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psrl_s_u16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psra_s_i16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssha_s_i16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psshar_s_i16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psshl_s_u16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psshlr_s_u16x4 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssha_s_i16x4_imm | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psshar_s_i16x4_imm | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssha_s_i16x4_neg_imm | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psshar_s_i16x4_neg_imm | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.