fallback: legalize: G_INTRINSIC <8 x s8>

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_INTRINSIC <8 x s8>
Occurrences:	13 in 1 configs, 1 test files
Snippet from:	rvp-simd-64.ll @test_paadd_v8i8 via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <8 x i8> @test_paadd_v8i8(<8 x i8> %a, <8 x i8> %b) {
  %res = call <8 x i8> @llvm.riscv.paadd.v8i8(<8 x i8> %a, <8 x i8> %b)
  ret <8 x i8> %res
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <8 x i8> @llvm.riscv.paadd.v8i8(<8 x i8>, <8 x i8>) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_INTRINSIC intrinsic(@llvm.riscv.paadd), %0:_(<8 x s8>), %1:_(<8 x s8>) (in function: test_paadd_v8i8)
warning: Instruction selection used fallback path for test_paadd_v8i8

Occurrences (13):

Input	Function	Config
rvp-simd-64.ll	test_paadd_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_paaddu_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pasub_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pasubu_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pabd_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pabdu_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_merge_u8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_mvm_u8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_mvmn_u8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_merge_i8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_mvm_i8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmerge_mvmn_i8x8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_psabs_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.