fallback: legalize: G_INTRINSIC s32,<4 x s8>

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_INTRINSIC s32,<4 x s8>
Occurrences:	11 in 2 configs, 1 test files
Snippet from:	rvp-simd-32.ll @test_predsum_i8x4_i32 via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define i32 @test_predsum_i8x4_i32(<4 x i8> %a, i32 %b) {
  %res = call i32 @llvm.riscv.predsum.i32.v4i8(<4 x i8> %a, i32 %b)
  ret i32 %res
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.riscv.predsum.i32.v4i8(<4 x i8>, i32) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %5:_(s32) = G_INTRINSIC intrinsic(@llvm.riscv.predsum), %0:_(<4 x s8>), %1:_(s32) (in function: test_predsum_i8x4_i32)
warning: Instruction selection used fallback path for test_predsum_i8x4_i32

Occurrences (11):

Input	Function	Config
rvp-simd-32.ll	test_predsum_i8x4_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_predsumu_u8x4_u32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pabdsumu_u8x4_u32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pabdsumau_u8x4_u32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pm4add_v4i8_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pm4addu_v4i8_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pm4addsu_v4i8_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.1561048a00.ll (mutant of rvp-simd-32.ll)	test_pm4add_v4i8_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.79cacf6ae1.ll (mutant of rvp-simd-32.ll)	test_predsum_i8x4_i32	`-mtriple=riscv32 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.939ca4e6a0.ll (mutant of rvp-simd-32.ll)	test_predsum_i8x4_i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.fe40feb1ef.ll (mutant of rvp-simd-32.ll)	test_pm4add_v4i8_i32	`-mtriple=riscv32 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.