fallback: legalize: G_INTRINSIC_W_SIDE_EFFECTS

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_INTRINSIC_W_SIDE_EFFECTS
Occurrences:31 in 6 configs, 4 test files
Snippet from:riscv-zihintpause.ll @test_pause via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_pause() {
  call void @llvm.riscv.pause()
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.riscv.pause() #0

attributes #0 = { nocallback nofree nosync nounwind willreturn }

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.riscv.pause) (in function: test_pause)
warning: Instruction selection used fallback path for test_pause

Occurrences (31):

InputFunctionConfig
riscv-zihintpause.lltest_pause-mtriple=riscv32 -verify-machineinstrs
riscv-zihintpause.lltest_pause-mtriple=riscv64 -mattr=+zihintpause -verify-machineinstrs
riscv-zihintpause.lltest_pause-mtriple=riscv64 -verify-machineinstrs
rv64-stackmap-nops.lltest_shadow_optimization-mtriple=riscv64
rv64-stackmap-nops.lltest_shadow_optimization-mtriple=riscv64 -mattr=+c
rv64-stackmap.llneedsStackRealignment-mtriple=riscv64
xmips-exectl.lltest_mips_pause-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.lltest_mips_ehb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.lltest_mips_ihb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
riscv-zihintpause.03b5882853.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -mattr=+zihintpause -verify-machineinstrs
riscv-zihintpause.04237f76fe.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv32 -verify-machineinstrs
riscv-zihintpause.3b9d4cd2a9.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -mattr=+zihintpause -verify-machineinstrs
riscv-zihintpause.402d983798.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv32 -verify-machineinstrs
riscv-zihintpause.4962ab83d8.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -verify-machineinstrs
riscv-zihintpause.5c98c8be3f.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -mattr=+zihintpause -verify-machineinstrs
riscv-zihintpause.5dc004de3f.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv32 -verify-machineinstrs
riscv-zihintpause.83b095235e.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -verify-machineinstrs
riscv-zihintpause.a2df081b7a.ll (mutant of riscv-zihintpause.ll)test_pause-mtriple=riscv64 -verify-machineinstrs
rv64-stackmap-nops.7a55ab390e.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64
rv64-stackmap-nops.92457d7577.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64 -mattr=+c
rv64-stackmap-nops.9bcebe4659.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64 -mattr=+c
rv64-stackmap-nops.a28476ae7a.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64 -mattr=+c
rv64-stackmap-nops.aceaf3791e.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64
rv64-stackmap-nops.d3d3573a82.ll (mutant of rv64-stackmap-nops.ll)test_shadow_optimization-mtriple=riscv64
rv64-stackmap.0e5eeacb12.ll (mutant of rv64-stackmap.ll)needsStackRealignment-mtriple=riscv64
xmips-exectl.69c63a7487.ll (mutant of xmips-exectl.ll)test_mips_ehb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.a305aeba9c.ll (mutant of xmips-exectl.ll)test_mips_ehb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.b2bfe4de76.ll (mutant of xmips-exectl.ll)test_mips_ehb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.b2bfe4de76.ll (mutant of xmips-exectl.ll)test_mips_ihb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.df9685dfce.ll (mutant of xmips-exectl.ll)test_mips_pause-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs
xmips-exectl.df9685dfce.ll (mutant of xmips-exectl.ll)test_mips_ihb-mtriple=riscv64 -mcpu=mips-p8700 -O3 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.