fallback: legalize: G_LOAD <4 x s16>,p0

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_LOAD <4 x s16>,p0
Occurrences:	26 in 6 configs, 3 test files
Snippet from:	rvp-unaligned-load-store.ll @test_store_v4i16_align1 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+experimental-p`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_store_v4i16_align1(ptr %a_ptr, ptr %b_ptr) {
  %a = load <4 x i16>, ptr %a_ptr, align 8
  store <4 x i16> %a, ptr %b_ptr, align 1
  ret void
}

Reproduce:

llc -mtriple=riscv32 -mattr=+experimental-p -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+experimental-p -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s16>) = G_LOAD %0:_(p0) :: (load (<4 x s16>) from %ir.a_ptr) (in function: test_store_v4i16_align1)
warning: Instruction selection used fallback path for test_store_v4i16_align1

Occurrences (26):

Input	Function	Config
rvp-unaligned-load-store.ll	test_store_v4i16_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i16_align2	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i16_align4	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v4i16_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i16_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i16_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align1	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i16_align2	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i16_align4	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v4i16_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i16_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i16_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i16_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.28e75cd729.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i16_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.3f2bb7c5d4.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i16_align4	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.813a076b12.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i16_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.e995bc881c.ll (mutant of rvp-unaligned-load-store.ll)	test_load_v4i16_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ec0c9c9959.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i16_align4	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.f5425ee3fb.ll (mutant of rvp-unaligned-load-store.ll)	test_load_v4i16_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-widening-shift.b867ef75ce.ll (mutant of rvp-widening-shift.ll)	pwslai_v4i8_16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-zip.3c4903d277.ll (mutant of rvp-zip.ll)	test_unzip16hp_v4i16	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.