fallback: legalize: G_LOAD <4 x s32>,p0

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_LOAD <4 x s32>,p0
Occurrences:184 in 109 configs, 54 test files
Snippet from:nontemporal.ll @test_nontemporal_load_v4i32 via llvm-extract
Config:-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i32> @test_nontemporal_load_v4i32(ptr %p) {
  %1 = load <4 x i32>, ptr %p, align 16, !nontemporal !0
  ret <4 x i32> %1
}

!0 = !{i32 1}

Reproduce:

llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s32>) = G_LOAD %0:_(p0) :: (non-temporal "riscv-nontemporal-domain-bit-0" "riscv-nontemporal-domain-bit-1" load (<4 x s32>) from %ir.p) (in function: test_nontemporal_load_v4i32)
warning: Instruction selection used fallback path for test_nontemporal_load_v4i32

Occurrences (184) (first 50):

InputFunctionConfig
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv32 -mattr=+v -relocation-model=pic -enable-tlsdesc
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv64 -mattr=+v -relocation-model=pic -enable-tlsdesc
alloca.bf937d2849.ll (mutant of alloca.ll)scoped_alloca-mtriple=riscv32 -verify-machineinstrs
arith-with-overflow.ee3927f3ed.ll (mutant of arith-with-overflow.ll)ssub-mtriple=riscv32 -verify-machineinstrs
atomic-rmw-sub.4b10838163.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i64_constant-mtriple=riscv64 -verify-machineinstrs
atomic-rmw-sub.58c880924e.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i64_constant-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw-sub.64a1af50ac.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i64_constant-mtriple=riscv32 -verify-machineinstrs
atomic-rmw-sub.85d62957c0.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i64_constant-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw-sub.ae0ca5e28f.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i64_constant-mtriple=riscv64 -mattr=+a -verify-machineinstrs
bigendian-double-bitmanip.b2e2a64b5d.ll (mutant of bigendian-double-bitmanip.ll)fabs-mtriple=riscv32 -target-abi=ilp32 -mattr=+d -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.