fallback: legalize: G_LSHR <4 x s32>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_LSHR <4 x s32>
Occurrences:47 in 31 configs, 10 test files
Snippet from:rvp-simd-64.ll @test_pasubu_h via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i16> @test_pasubu_h(<4 x i16> %a, <4 x i16> %b) {
  %a_ext = zext <4 x i16> %a to <4 x i32>
  %b_ext = zext <4 x i16> %b to <4 x i32>
  %sub = sub <4 x i32> %a_ext, %b_ext
  %res = lshr <4 x i32> %sub, splat (i32 1)
  %res_trunc = trunc <4 x i32> %res to <4 x i16>
  ret <4 x i16> %res_trunc
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<4 x s32>) = G_LSHR %4:_, %5:_(<4 x s32>) (in function: test_pasubu_h)
warning: Instruction selection used fallback path for test_pasubu_h

Occurrences (47):

InputFunctionConfig
rvp-simd-64.lltest_pasubu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulh_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhsu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhsu_h_commuted-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhr_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhru_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhrsu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhrsu_h_commuted-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulhu_v4i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
umulh.llumulh_v4i16-mtriple=riscv32 -mattr=+m
umulh.llumulh_v4i16-mtriple=riscv64 -mattr=+m
atomic-load-zext.0e176f7a69.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -verify-machineinstrs
atomic-load-zext.1e85f24593.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-load-zext.2328e882b7.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -verify-machineinstrs
atomic-load-zext.24f599740c.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-load-zext.40dd51edd5.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a,+ztso,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.66a25a71f4.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-load-zext.7caa9e00fd.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a,+zalasr,+ztso -verify-machineinstrs
atomic-load-zext.a640bfd624.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a,+zalasr,+ztso -verify-machineinstrs
atomic-load-zext.af9ab341a3.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a,+ztso,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.b90c71d5c3.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.bc7e7cdca9.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a,+zalasr -verify-machineinstrs
atomic-load-zext.c9f4a49a63.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-load-zext.d0b0f7eb4f.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a,+zalasr -verify-machineinstrs
atomic-load-zext.db912f4a02.ll (mutant of atomic-load-zext.ll)atomic_load_i32_unordered-mtriple=riscv64 -mattr=+a,+no-trailing-seq-cst-fence -verify-machineinstrs
double_reduct.950e040f4b.ll (mutant of double_reduct.ll)umax_i32-mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs
double_reduct.d99c87b855.ll (mutant of double_reduct.ll)umax_i32-mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs
float-br-fcmp.5eaf9f6313.ll (mutant of float-br-fcmp.ll)br_fcmp_ult-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-br-fcmp.a7adec1d5b.ll (mutant of float-br-fcmp.ll)br_fcmp_ult-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
known-fpclass.b92294b27e.ll (mutant of known-fpclass.ll)select_rhs_unknown-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d
stack-realignment.17eaa191a4.ll (mutant of stack-realignment.ll)caller256-mtriple=riscv64 -verify-machineinstrs
stack-realignment.1d90c3d5af.ll (mutant of stack-realignment.ll)caller256-mtriple=riscv64 -target-abi lp64e -verify-machineinstrs
stack-realignment.6ca8cec064.ll (mutant of stack-realignment.ll)caller256-mtriple=riscv32 -verify-machineinstrs
stack-realignment.6cac6953e7.ll (mutant of stack-realignment.ll)caller256-mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs
umulh.2f667d2c14.ll (mutant of umulh.ll)umulh_v4i16-mtriple=riscv32 -mattr=+m
umulh.84f7c60ca3.ll (mutant of umulh.ll)umulh_v4i16-mtriple=riscv64 -mattr=+m
umulh.bc0b2d5122.ll (mutant of umulh.ll)umulh_v4i16-mtriple=riscv64 -mattr=+m
umulh.e328e54510.ll (mutant of umulh.ll)umulh_v4i16-mtriple=riscv32 -mattr=+m
xqcibm-cto-clo-brev.113c0786d4.ll (mutant of xqcibm-cto-clo-brev.ll)test_ctlz_i8_zero_poison-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
xqcibm-cto-clo-brev.78994c5f1f.ll (mutant of xqcibm-cto-clo-brev.ll)test_ctlz_i8_zero_poison-mtriple=riscv32 -verify-machineinstrs
xqcibm-cto-clo-brev.caa34e2548.ll (mutant of xqcibm-cto-clo-brev.ll)test_ctlz_i8_zero_poison-mtriple=riscv32 -mattr=+zbb,xqcibm -verify-machineinstrs
zdinx-boundary-check.4dfb35c240.ll (mutant of zdinx-boundary-check.ll)foo9-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64
zdinx-boundary-check.710a2a0435.ll (mutant of zdinx-boundary-check.ll)foo9-mtriple=riscv32 -mattr=+zdinx,+unaligned-scalar-mem -verify-machineinstrs -target-abi=ilp32
zdinx-boundary-check.e4ae102e90.ll (mutant of zdinx-boundary-check.ll)foo9-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32
zibi.a98d5b668f.ll (mutant of zibi.ll)test_select_beq_zero-mtriple=riscv64 -mattr=+experimental-zibi -verify-machineinstrs
zibi.e1c8dbcf75.ll (mutant of zibi.ll)test_select_beq_zero-mtriple=riscv32 -mattr=+experimental-zibi -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.