fallback: legalize: G

fallback: legalize: G_SDIV <8 x s8>

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_SDIV <8 x s8>
Occurrences:	32 in 25 configs, 6 test files
Snippet from:	rvp-simd-64.ll @test_psdiv_b via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <8 x i8> @test_psdiv_b(<8 x i8> %a, <8 x i8> %b) {
  %res = sdiv <8 x i8> %a, %b
  ret <8 x i8> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_SDIV %0:_, %1:_ (in function: test_psdiv_b)
warning: Instruction selection used fallback path for test_psdiv_b

Occurrences (32):

Input	Function	Config
rvp-simd-64.ll	test_psdiv_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_psdiv_mulhs_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_psdiv_mulhsu_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
bittest.3c6432aff1.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv32 -mattr=+zbs -verify-machineinstrs`
bittest.656d6055b7.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv32 -verify-machineinstrs`
bittest.9742540556.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv32 -mattr=+xtheadbs -verify-machineinstrs`
bittest.a34cbba781.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv64 -mattr=+xtheadbs -verify-machineinstrs`
bittest.a76086c6f6.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv64 -verify-machineinstrs`
bittest.b90f8bfb1c.ll (mutant of bittest.ll)	bit_11_1_nz_select_i64	`-mtriple=riscv64 -mattr=+zbs -verify-machineinstrs`
rv64zbb.35f6a74fb5.ll (mutant of rv64zbb.ll)	sub_if_uge_C_multiuse_cmp_i32	`-mtriple=riscv64 -verify-machineinstrs`
rv64zbb.b5d0614785.ll (mutant of rv64zbb.ll)	sub_if_uge_C_multiuse_cmp_i32	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
stack-clash-prologue.2fc81e46e4.ll (mutant of stack-clash-prologue.ll)	f12	`-mtriple=riscv64 -mattr=+m -O2`
stack-clash-prologue.ea63ab965a.ll (mutant of stack-clash-prologue.ll)	f12	`-mtriple=riscv32 -mattr=+m -O2`
unaligned-load-store.1ad99b5fb5.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv32 -mattr=+unaligned-scalar-mem -verify-machineinstrs`
unaligned-load-store.34f21e1a36.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs`
unaligned-load-store.36593567d3.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv32 -verify-machineinstrs`
unaligned-load-store.779474158e.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv64 -mattr=+unaligned-scalar-mem -verify-machineinstrs`
unaligned-load-store.8b5a9e65b1.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs`
unaligned-load-store.da00df180e.ll (mutant of unaligned-load-store.ll)	merge_stores_i8_i32	`-mtriple=riscv64 -verify-machineinstrs`
vararg.2bc67fd40c.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -target-abi lp64e -verify-machineinstrs`
vararg.36e57beb78.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs`
vararg.3890a9f731.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -verify-machineinstrs -frame-pointer=all`
vararg.3cd1daa03a.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -mattr=+d -target-abi lp64d -verify-machineinstrs`
vararg.43eb737f13.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -target-abi ilp32e -frame-pointer=all -verify-machineinstrs`
vararg.4402129eb2.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -verify-machineinstrs`
vararg.5c04f76f0e.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -verify-machineinstrs -frame-pointer=all`
vararg.8194d5a514.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs`
vararg.abed7d3ae7.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -mattr=+d -target-abi lp64f -verify-machineinstrs`
vararg.b39348f936.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -verify-machineinstrs`
vararg.b8cf9c3be0.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -mattr=+d -target-abi ilp32f -verify-machineinstrs`
vararg.b8dda32768.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs`
vararg.da228035ca.ll (mutant of vararg.ll)	va6_no_fixed_args	`-mtriple=riscv64 -target-abi lp64e -frame-pointer=all -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.