fallback: legalize: G_STORE <3 x s1>,p0

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_STORE <3 x s1>,p0 NEW
Occurrences:12 in 8 configs, 2 test files
Snippet from:srem-seteq-illegal-types.037a3203d7.ll (mutant of srem-seteq-illegal-types.ll) @test_srem_vec via llvm-extract + llvm-reduce
Config:-mtriple=riscv32 -mattr=+m,+v
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/3b51zjxd9 (llc-assertions-trunk, checked 2026-10-15 08:05 UTC): G reproduces

Snippet:

define void @test_srem_vec() {
  store <3 x i1> zeroinitializer, ptr null, align 1
  ret void
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -mattr=+m,+v -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*02remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0:_(<3 x s1>), %2:_(p0) :: (store (<3 x s1>) into `ptr null`) (in function: test_srem_vec)
warning: Instruction selection used fallback path for test_srem_vec
SelectionDAG (control)-mtriple=riscv32 -mattr=+m,+v -global-isel=002-

Reproduce:

llc -mtriple=riscv32 -mattr=+m,+v -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+m,+v -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0:_(<3 x s1>), %2:_(p0) :: (store (<3 x s1>) into `ptr null`) (in function: test_srem_vec)
warning: Instruction selection used fallback path for test_srem_vec

Occurrences (12):

InputFunctionConfig
llvm.exp10.05994ea113.ll (mutant of llvm.exp10.ll)exp10_v3f32-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
llvm.exp10.1cbabe6181.ll (mutant of llvm.exp10.ll)exp10_v3f16-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
llvm.exp10.5bb6ceff66.ll (mutant of llvm.exp10.ll)exp10_v3f16-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
llvm.exp10.665722de91.ll (mutant of llvm.exp10.ll)exp10_v3f32-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
llvm.exp10.76c0d89f6b.ll (mutant of llvm.exp10.ll)exp10_v3f64-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
llvm.exp10.d5f31b4988.ll (mutant of llvm.exp10.ll)exp10_v3f64-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
srem-seteq-illegal-types.037a3203d7.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv32 -mattr=+m,+v
srem-seteq-illegal-types.0bcefac2fc.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv32
srem-seteq-illegal-types.396927e5e1.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv64 -mattr=+m
srem-seteq-illegal-types.87e0e9785e.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv64 -mattr=+m,+v
srem-seteq-illegal-types.e7c5548f40.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv32 -mattr=+m
srem-seteq-illegal-types.efa6e04296.ll (mutant of srem-seteq-illegal-types.ll)test_srem_vec-mtriple=riscv64

Generated 2026-10-15 08:05 UTC.