| Input | Function | Config |
|---|
| llvm.exp10.05994ea113.ll (mutant of llvm.exp10.ll) | exp10_v3f32 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| llvm.exp10.1cbabe6181.ll (mutant of llvm.exp10.ll) | exp10_v3f16 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| llvm.exp10.5bb6ceff66.ll (mutant of llvm.exp10.ll) | exp10_v3f16 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| llvm.exp10.665722de91.ll (mutant of llvm.exp10.ll) | exp10_v3f32 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| llvm.exp10.76c0d89f6b.ll (mutant of llvm.exp10.ll) | exp10_v3f64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| llvm.exp10.d5f31b4988.ll (mutant of llvm.exp10.ll) | exp10_v3f64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| srem-seteq-illegal-types.037a3203d7.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv32 -mattr=+m,+v |
| srem-seteq-illegal-types.0bcefac2fc.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv32 |
| srem-seteq-illegal-types.396927e5e1.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv64 -mattr=+m |
| srem-seteq-illegal-types.87e0e9785e.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv64 -mattr=+m,+v |
| srem-seteq-illegal-types.e7c5548f40.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv32 -mattr=+m |
| srem-seteq-illegal-types.efa6e04296.ll (mutant of srem-seteq-illegal-types.ll) | test_srem_vec | -mtriple=riscv64 |
Generated 2026-10-15 08:05 UTC.