fallback: legalize: G

fallback: legalize: G_SUB <8 x s8>

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_SUB <8 x s8>
Occurrences:	28 in 15 configs, 9 test files
Snippet from:	rvp-simd-64.ll @test_psub_b via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <8 x i8> @test_psub_b(<8 x i8> %a, <8 x i8> %b) {
  %res = sub <8 x i8> %a, %b
  ret <8 x i8> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_SUB %0:_, %1:_ (in function: test_psub_b)
warning: Instruction selection used fallback path for test_psub_b

Occurrences (28):

Input	Function	Config
rvp-simd-64.ll	test_psub_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pdif_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pdifu_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
and-negpow2-cmp.1eff71ac1d.ll (mutant of and-negpow2-cmp.ll)	test13	`-mtriple=riscv64`
and-negpow2-cmp.ae9527b8af.ll (mutant of and-negpow2-cmp.ll)	test13	`-mtriple=riscv32`
and.bebd077b3c.ll (mutant of and.ll)	and64_0xffffffff80000000	`-mtriple=riscv32 -verify-machineinstrs`
and.d8ad88d40d.ll (mutant of and.ll)	and64_0xffffffff80000000	`-mtriple=riscv64 -verify-machineinstrs`
calling-conv-p-ext-vector.2aab5fa8ed.ll (mutant of calling-conv-p-ext-vector.ll)	test_exhaust_2xlen_rv32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
ctz_zero_return_test.23b568f81d.ll (mutant of ctz_zero_return_test.ll)	test_ctlz_select_i10	`-mtriple=riscv64 -verify-machineinstrs`
ctz_zero_return_test.2f47a8a8ba.ll (mutant of ctz_zero_return_test.ll)	test_ctlz_select_i10	`-mtriple=riscv32 -verify-machineinstrs`
ctz_zero_return_test.c223e2bcbe.ll (mutant of ctz_zero_return_test.ll)	test_ctlz_select_i10	`-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs`
ctz_zero_return_test.e4937050d4.ll (mutant of ctz_zero_return_test.ll)	test_ctlz_select_i10	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
inline-asm.2622a3c272.ll (mutant of inline-asm.ll)	modifier_N_with_cr_reg	`-mtriple=riscv32 -verify-machineinstrs -no-integrated-as`
inline-asm.b95c429eb9.ll (mutant of inline-asm.ll)	modifier_N_with_cr_reg	`-mtriple=riscv64 -verify-machineinstrs -no-integrated-as`
neg-abs.11c4888e08.ll (mutant of neg-abs.ll)	expanded_neg_inv_abs64	`-mtriple=riscv32 -verify-machineinstrs`
neg-abs.d8b7b38433.ll (mutant of neg-abs.ll)	expanded_neg_inv_abs64	`-mtriple=riscv64 -verify-machineinstrs`
neg-abs.ec7bd04712.ll (mutant of neg-abs.ll)	expanded_neg_inv_abs64	`-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs`
neg-abs.ee34442041.ll (mutant of neg-abs.ll)	expanded_neg_inv_abs64	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
select-binop-identity.2a7a95eaa0.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv32 -verify-machineinstrs`
select-binop-identity.32a2c155da.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv64 -mattr=+c,+conditional-cmv-fusion -verify-machineinstrs`
select-binop-identity.39a13ac631.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv64 -mcpu=sifive-u74 -verify-machineinstrs`
select-binop-identity.545c3360b7.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv64 -mattr=+zicond -verify-machineinstrs`
select-binop-identity.93ffdf58e9.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv64 -verify-machineinstrs`
select-binop-identity.ab8556ecc1.ll (mutant of select-binop-identity.ll)	sub_select_all_zeros_i32	`-mtriple=riscv32 -mattr=+zicond -verify-machineinstrs`
selectcc-to-shiftand.424f6c9e69.ll (mutant of selectcc-to-shiftand.ll)	sel_shift_bool_i64	`-mtriple=riscv32 -mattr=+zbb`
selectcc-to-shiftand.82f49164e9.ll (mutant of selectcc-to-shiftand.ll)	sel_shift_bool_i64	`-mtriple=riscv32`
selectcc-to-shiftand.993a67eece.ll (mutant of selectcc-to-shiftand.ll)	sel_shift_bool_i64	`-mtriple=riscv64`
selectcc-to-shiftand.d45e5de43c.ll (mutant of selectcc-to-shiftand.ll)	sel_shift_bool_i64	`-mtriple=riscv64 -mattr=+zbb`

Generated 2026-10-15 08:05 UTC.