fallback: legalize: G_UMULH s64

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_UMULH s64
Occurrences:66 in 29 configs, 25 test files
Snippet from:div.ll @udiv64_constant via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i64 @udiv64_constant(i64 %a) #0 {
  %1 = udiv i64 %a, 5
  ret i64 %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %11:_(s64) = G_UMULH %0:_, %8:_ (in function: udiv64_constant)
warning: Instruction selection used fallback path for udiv64_constant

Occurrences (66) (first 50):

InputFunctionConfig
bitint-fp-conv-200.lltest_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
div.lludiv64_constant-mtriple=riscv32 -verify-machineinstrs
fp128.llfptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fpclamptosat.llstest_f64i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f64i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f32i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f32i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f64i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f64i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f32i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f32i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
mul.llmuli128_m3840-mtriple=riscv32 -verify-machineinstrs
mul.llmuli128_m63-mtriple=riscv32 -verify-machineinstrs
mul.llmulhsu_i64-mtriple=riscv32 -verify-machineinstrs
umulh.llumulh_i64-mtriple=riscv32
umulh.llumulh_v1i64-mtriple=riscv32
urem-lkk.lldont_fold_urem_i64-mtriple=riscv32 -verify-machineinstrs
alu32.2966f1bd11.ll (mutant of alu32.ll)sltiu-mtriple=riscv32 -verify-machineinstrs
bitint-fp-conv-200.307d5a1e23.ll (mutant of bitint-fp-conv-200.ll)test_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
bitint-fp-conv-200.95367f9ec2.ll (mutant of bitint-fp-conv-200.ll)test_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
blockaddress.087e52728d.ll (mutant of blockaddress.ll)test_blockaddress-mtriple=riscv32 -verify-machineinstrs
callee-saved-fpr32s.25a5a9f579.ll (mutant of callee-saved-fpr32s.ll)caller-mtriple=riscv32 -mattr=+f -target-abi ilp32 -verify-machineinstrs
callee-saved-fpr32s.4114c78b93.ll (mutant of callee-saved-fpr32s.ll)caller-mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs
callee-saved-fpr32s.777cd9d01b.ll (mutant of callee-saved-fpr32s.ll)caller-mtriple=riscv32 -mattr=+f -target-abi ilp32f -verify-machineinstrs
callee-saved-fpr32s.c62ada7b34.ll (mutant of callee-saved-fpr32s.ll)caller-mtriple=riscv32 -mattr=+f -target-abi ilp32e -verify-machineinstrs
callee-saved-fpr64s.c59b34dd10.ll (mutant of callee-saved-fpr64s.ll)caller-mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs
callee-saved-fpr64s.f1a8554f50.ll (mutant of callee-saved-fpr64s.ll)caller-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
compress-opt-select.460374cde8.ll (mutant of compress-opt-select.ll)ne_small_edge_pos-mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d -M no-aliases
compress-opt-select.6851a1c10c.ll (mutant of compress-opt-select.ll)ne_small_edge_pos-mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d -M no-aliases
compress-opt-select.bca8951844.ll (mutant of compress-opt-select.ll)ne_small_edge_pos-mtriple=riscv32 -target-abi ilp32d -mattr=+zca,+f,+d -M no-aliases
ctlz-cttz-ctpop.030fc990e2.ll (mutant of ctlz-cttz-ctpop.ll)test_cttz_i32-mtriple=riscv32 -verify-machineinstrs
ctlz-cttz-ctpop.a17dd2efc8.ll (mutant of ctlz-cttz-ctpop.ll)test_cttz_i32-mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs
ctlz-cttz-ctpop.ecc0130bd6.ll (mutant of ctlz-cttz-ctpop.ll)test_cttz_i32-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
div.b9b98d217c.ll (mutant of div.ll)udiv64_constant-mtriple=riscv32 -verify-machineinstrs
double-round-conv-sat.0f34aae4f6.ll (mutant of double-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-round-conv-sat.b2d8d995f1.ll (mutant of double-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32
float-round-conv-sat.57afe01428.ll (mutant of float-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-round-conv-sat.f70e938249.ll (mutant of float-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32
fp128.0392cb2e82.ll (mutant of fp128.ll)fptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fp128.ab2ecbed3d.ll (mutant of fp128.ll)fptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fpclamptosat.b29eadb829.ll (mutant of fpclamptosat.ll)ustest_f32i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
half-arith.210e90203f.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-arith.3dbe4fcdb7.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -verify-machineinstrs
half-arith.b13ace9b2d.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-round-conv-sat.33bd7ff25e.ll (mutant of half-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi=ilp32
half-round-conv-sat.83ea18a4c6.ll (mutant of half-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi=ilp32f
half-round-conv-sat.cacfb9a79a.ll (mutant of half-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi=ilp32f
half-round-conv-sat.d07b310f1d.ll (mutant of half-round-conv-sat.ll)test_floor_ui32-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi=ilp32
mask-variable-shift.1415762428.ll (mutant of mask-variable-shift.ll)mask_pair_128-mtriple=riscv32 -verify-machineinstrs
mul-expand.9fd96c14cc.ll (mutant of mul-expand.ll)muli32_0x33333333-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.