fallback: legalize: G_XOR <8 x s8>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_XOR <8 x s8>
Occurrences:33 in 18 configs, 10 test files
Snippet from:rvp-simd-64.ll @test_xor_b via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <8 x i8> @test_xor_b(<8 x i8> %a, <8 x i8> %b) {
  %res = xor <8 x i8> %a, %b
  ret <8 x i8> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_XOR %0:_, %1:_ (in function: test_xor_b)
warning: Instruction selection used fallback path for test_xor_b

Occurrences (33):

InputFunctionConfig
rvp-simd-64.lltest_xor_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_xnor_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_not_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pabs_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
and-negpow2-cmp.1eff71ac1d.ll (mutant of and-negpow2-cmp.ll)test10-mtriple=riscv64
and-negpow2-cmp.ae9527b8af.ll (mutant of and-negpow2-cmp.ll)test10-mtriple=riscv32
and.bebd077b3c.ll (mutant of and.ll)and64_0xfffffffffffffa00-mtriple=riscv32 -verify-machineinstrs
and.d8ad88d40d.ll (mutant of and.ll)and64_0xfffffffffffffa00-mtriple=riscv64 -verify-machineinstrs
calling-conv-p-ext-vector.2aab5fa8ed.ll (mutant of calling-conv-p-ext-vector.ll)test_call_v8i8-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
ctz_zero_return_test.04f94966f4.ll (mutant of ctz_zero_return_test.ll)ctz_dereferencing_pointer_zext-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
ctz_zero_return_test.2890aa16ce.ll (mutant of ctz_zero_return_test.ll)ctz_dereferencing_pointer_zext-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs
ctz_zero_return_test.c370cd69fe.ll (mutant of ctz_zero_return_test.ll)ctz_dereferencing_pointer_zext-mtriple=riscv32 -verify-machineinstrs
ctz_zero_return_test.f65746196b.ll (mutant of ctz_zero_return_test.ll)ctz_dereferencing_pointer_zext-mtriple=riscv64 -verify-machineinstrs
half-zfa-fli.1139807382.ll (mutant of half-zfa-fli.ll)loadfpimm2-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin
half-zfa-fli.737d909376.ll (mutant of half-zfa-fli.ll)loadfpimm2-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa-fli.bae18567d3.ll (mutant of half-zfa-fli.ll)loadfpimm2-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfh
half-zfa-fli.eefebd38ec.ll (mutant of half-zfa-fli.ll)loadfpimm2-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfh
neg-abs.11c4888e08.ll (mutant of neg-abs.ll)expanded_neg_abs64_unsigned-mtriple=riscv32 -verify-machineinstrs
neg-abs.d8b7b38433.ll (mutant of neg-abs.ll)expanded_neg_abs64_unsigned-mtriple=riscv64 -verify-machineinstrs
neg-abs.ec7bd04712.ll (mutant of neg-abs.ll)expanded_neg_abs64_unsigned-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
neg-abs.ee34442041.ll (mutant of neg-abs.ll)expanded_neg_abs64_unsigned-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs
select-binop-identity.2a7a95eaa0.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv32 -verify-machineinstrs
select-binop-identity.32a2c155da.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv64 -mattr=+c,+conditional-cmv-fusion -verify-machineinstrs
select-binop-identity.39a13ac631.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv64 -mcpu=sifive-u74 -verify-machineinstrs
select-binop-identity.545c3360b7.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv64 -mattr=+zicond -verify-machineinstrs
select-binop-identity.93ffdf58e9.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv64 -verify-machineinstrs
select-binop-identity.ab8556ecc1.ll (mutant of select-binop-identity.ll)xor_select_all_zeros_i64-mtriple=riscv32 -mattr=+zicond -verify-machineinstrs
selectcc-to-shiftand.424f6c9e69.ll (mutant of selectcc-to-shiftand.ll)sel_shift_bool_i8-mtriple=riscv32 -mattr=+zbb
selectcc-to-shiftand.82f49164e9.ll (mutant of selectcc-to-shiftand.ll)sel_shift_bool_i8-mtriple=riscv32
selectcc-to-shiftand.993a67eece.ll (mutant of selectcc-to-shiftand.ll)sel_shift_bool_i8-mtriple=riscv64
selectcc-to-shiftand.d45e5de43c.ll (mutant of selectcc-to-shiftand.ll)sel_shift_bool_i8-mtriple=riscv64 -mattr=+zbb
xqcibi.7cb8ac3ac6.ll (mutant of xqcibi.ll)bgeimm16-mtriple=riscv32 -mattr=+xqcibi -verify-machineinstrs
xqcibi.bb6ce117dc.ll (mutant of xqcibi.ll)bgeimm16-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.