fallback: translate: call llvm.experimental.constrained.fptoui.i32.f32

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptoui.i32.f32
Occurrences:45 in 9 configs, 3 test files
Snippet from:float-convert-strict.ll @fcvt_wu_s via llvm-extract
Config:-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i32 @fcvt_wu_s(float %a) #0 {
  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict")
  ret i32 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptoui.i32.f32: '  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %a, metadata !"fpexcept.strict")' (in function: fcvt_wu_s)
warning: Instruction selection used fallback path for fcvt_wu_s

Occurrences (45):

InputFunctionConfig
float-convert-strict.llfcvt_wu_s-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.llfcvt_wu_s-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.llfcvt_wu_s-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.llfcvt_wu_s-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.llfcvt_wu_s-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.llfcvt_wu_s-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.llfcvt_wu_s_multiple_use-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64i-single-softfloat.llstrict_fp32_to_ui32-mtriple=riscv64 -verify-machineinstrs
float-convert-strict.089be128fa.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.24b7b3c405.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.24b7b3c405.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.307ae22fdc.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.3927626499.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.3927626499.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.553fb29b5e.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.553fb29b5e.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.55ed6a56aa.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.55ed6a56aa.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.59bd813595.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.59bd813595.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.8227943012.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.874058274f.ll (mutant of float-convert-strict.ll)fcvt_wu_s-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.874058274f.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.b25fe00c31.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.c9b01095d0.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.cb1b9f624b.ll (mutant of float-convert-strict.ll)fcvt_wu_s_multiple_use-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
rv64f-float-convert-strict.1bf93c590d.ll (mutant of rv64f-float-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.4c269e57ac.ll (mutant of rv64f-float-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.ba6524f7c8.ll (mutant of rv64f-float-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.e2ee9be0c9.ll (mutant of rv64f-float-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64i-single-softfloat.368a4caf29.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-single-softfloat.5399fa0e16.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-single-softfloat.5b8b40e6d9.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-single-softfloat.a92af1a591.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_ui32-mtriple=riscv64 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.