fallback: translate: call llvm.experimental.constrained.fptoui.i64.f16

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptoui.i64.f16
Occurrences:51 in 17 configs, 1 test files
Snippet from:half-convert-strict.ll @fcvt_lu_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i64 @fcvt_lu_h(half %a) #0 {
  %1 = call i64 @llvm.experimental.constrained.fptoui.i64.f16(half %a, metadata !"fpexcept.strict")
  ret i64 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i64 @llvm.experimental.constrained.fptoui.i64.f16(half, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptoui.i64.f16: '  %1 = call i64 @llvm.experimental.constrained.fptoui.i64.f16(half %a, metadata !"fpexcept.strict")' (in function: fcvt_lu_h)
warning: Instruction selection used fallback path for fcvt_lu_h

Occurrences (51) (first 50):

InputFunctionConfig
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_lu_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.051e66d1c6.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.06e1ca19bd.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.070c5f8da1.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.0a2ddaaeb7.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.1278667999.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.16b9e429dd.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.1ad81c5486.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.20c098d70c.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.251b816819.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.33b885e050.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.40737f65d0.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.4e8cc8872b.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.5e0e7d89a3.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.669514174d.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.6b4d5521ef.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.70140c8195.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.90f73469d5.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.924d001bb1.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.97253bf56a.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.a6fb702d1a.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.a8e0997aab.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.bdd8cde999.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.d151fe1994.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.d2b9b457d0.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.da8ddd67d5.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.e706b07704.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.e7f617857d.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.e9898f3b2c.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.eace7afdd2.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.edd43a7cd4.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.f05d1d1040.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.f1a183eab1.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.f2407b8011.ll (mutant of half-convert-strict.ll)fcvt_lu_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation

Generated 2026-10-15 08:05 UTC.