regression: +76 insts: mul4100 (rv32zba.ll)

Run:explore-bc8218b282-20261015-075519
Kind:regression
Category:+76 insts: mul4100 (rv32zba.ll)
Occurrences:1 in 1 configs, 1 test files
Snippet from:rv32zba.0529319a10.ll (mutant of rv32zba.ll) @mul4100 via llvm-extract
Config:-mtriple=riscv32 -mattr=+m,+xandesperf -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

@G.1 = external global i1

define i32 @mul4100(i32 %a) {
  %A12 = alloca i1, align 1
  store i1 false, ptr %A12, align 1
  %A10 = alloca i1, align 1
  store i1 false, ptr %A10, align 1
  %A7 = alloca i1, align 1
  store i1 false, ptr %A7, align 1
  %A = alloca i64, align 8
  store i64 0, ptr %A, align 4
  %L = load i64, ptr %A, align 4
  switch i64 %L, label %SW_D [
    i64 -5100812043410437037, label %SW_C
    i64 3799803491824105201, label %SW_C1
    i64 -1669152299557309102, label %SW_C2
    i64 3518429279805702578, label %SW_C3
    i64 -316754220917638895, label %SW_C4
    i64 -3199446631125095545, label %SW_C5
    i64 -647582233171486285, label %SW_C6
  ]

BB:                                               ; preds = %SW_C6, %SW_C4, %SW_C3, %SW_C2, %SW_C1, %SW_C, %SW_D
  %c = mul i32 %a, 4100
  ret i32 %c

SW_D:                                             ; preds = %SW_D, %0
  %LGV = load i1, ptr @G.1, align 1
  br i1 %LGV, label %BB, label %SW_D

SW_C:                                             ; preds = %0
  br label %BB

SW_C1:                                            ; preds = %SW_C1, %0
  %L8 = load i1, ptr %A7, align 1
  br i1 %L8, label %SW_C1, label %BB

SW_C2:                                            ; preds = %0
  br label %BB

SW_C3:                                            ; preds = %SW_C3, %0
  %LGV9 = load i1, ptr @G.1, align 1
  %L11 = load i1, ptr %A10, align 1
  br i1 %L11, label %SW_C3, label %BB

SW_C4:                                            ; preds = %SW_C4, %0
  %L13 = load i1, ptr %A12, align 1
  br i1 %L13, label %BB, label %SW_C4

SW_C5:                                            ; preds = %0
  ret i32 65536

SW_C6:                                            ; preds = %0
  br label %BB
}

Reproduce:

llc -mtriple=riscv32 -mattr=+m,+xandesperf -verify-machineinstrs -global-isel snippet.ll -o -
llc -mtriple=riscv32 -mattr=+m,+xandesperf -verify-machineinstrs -global-isel=0 snippet.ll -o -

Assembly diff (SelectionDAG vs GlobalISel):

--- sdag
+++ gisel
@@ -1,34 +1,118 @@
 addi sp, sp, -16
+mv a1, sp
+sw zero, 4(a1)
+sw zero, 0(sp)
+lw a1, 4(sp)
+lw a2, 0(sp)
+lui a3, 872282
+addi a3, a3, -1613
+lui a4, 1011765
+addi a4, a4, 867
 sb zero, 15(sp)
 sb zero, 14(sp)
 sb zero, 13(sp)
-sw zero, 0(sp)
-sw zero, 4(sp)
-j .L0
+beq a1, a4, .L0
+slt a5, a1, a4
+xori a5, a5, 1
+beqz a5, .L1
+.L2:
+lui a5, 200000
+lui a6, 909936
+addi a5, a5, -1847
+addi a6, a6, 434
+beq a1, a5, .L3
+slt a7, a1, a5
+xori a7, a7, 1
+beqz a7, .L4
+.L5:
+xor a3, a2, a6
+xor a5, a1, a5
+or a3, a3, a5
+beqz a3, .L6
+lui a3, 796527
+lui a4, 215994
+addi a3, a3, 1777
+addi a4, a4, -732
+xor a2, a2, a3
+xor a1, a1, a4
+or a1, a2, a1
+bnez a1, .L7
+lbu a1, 13(sp)
+andi a1, a1, 1
+.L8:
+bnez a1, .L8
+j .L9
+.L0:
+sltu a5, a2, a3
+xori a5, a5, 1
+bnez a5, .L2
+.L1:
+lui a3, 813001
+lui a4, 758628
+addi a3, a3, -941
+addi a4, a4, 1656
+xor a3, a2, a3
+xor a4, a1, a4
+or a3, a3, a4
+beqz a3, .L9
+lui a3, 565119
+lui a4, 866709
+addi a3, a3, -1145
+addi a4, a4, -1987
+xor a3, a2, a3
+xor a4, a1, a4
+or a3, a3, a4
+beqz a3, .L10
+lui a3, 773571
+lui a4, 953696
+addi a3, a3, 1362
+addi a4, a4, -1325
+xor a2, a2, a3
+xor a1, a1, a4
+or a1, a2, a1
+beqz a1, .L9
+j .L7
+.L3:
+sltu a7, a2, a6
+xori a7, a7, 1
+bnez a7, .L5
+.L4:
+xor a3, a2, a3
+xor a4, a1, a4
+or a3, a3, a4
+beqz a3, .L9
+lui a3, 905620
+lui a4, 1030571
+addi a3, a3, -1775
+addi a4, a4, -1610
+xor a2, a2, a3
+xor a1, a1, a4
+or a1, a2, a1
+bnez a1, .L7
 lbu a1, 15(sp)
-.L1:
-beqz a1, .L1
-j .L2
-j .L0
-j .L0
-lbu a1, 13(sp)
-.L3:
-bnez a1, .L3
-j .L2
-.L0:
+andi a1, a1, 1
+.L11:
+beqz a1, .L11
+j .L9
+.L7:
 lui a1, %hi(G.1)
 lbu a1, %lo(G.1)(a1)
-.L4:
-beqz a1, .L4
-j .L2
+andi a1, a1, 1
+.L12:
+beqz a1, .L12
+j .L9
+.L6:
 lbu a1, 14(sp)
-.L5:
-bnez a1, .L5
-.L2:
-slli a1, a0, 12
-nds.lea.w a0, a1, a0
+andi a1, a1, 1
+.L13:
+bnez a1, .L13
+.L9:
+lui a1, 1
+addi a1, a1, 4
+mul a0, a0, a1
 addi sp, sp, 16
 ret
+.L10:
 lui a0, 16
 addi sp, sp, 16
 ret

Occurrences (1):

InputFunctionConfig
rv32zba.0529319a10.ll (mutant of rv32zba.ll)mul4100-mtriple=riscv32 -mattr=+m,+xandesperf -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.