fallback: legalize: G_BUILD_VECTOR <4 x s16>,s16

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_BUILD_VECTOR <4 x s16>,s16
Occurrences:14 in 1 configs, 2 test files
Snippet from:rvp-simd-32.ll @test_pli_h via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i16> @test_pli_h() {
  ret <2 x i16> splat (i16 42)
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s16>) = G_BUILD_VECTOR %1:_(s16), %1:_(s16), %5:_(s16), %5:_(s16) (in function: test_pli_h)
warning: Instruction selection used fallback path for test_pli_h

Occurrences (14):

InputFunctionConfig
rvp-simd-32.lltest_pli_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_pli_h_negative-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_pli_b_v2i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_pli_b_negative_v2i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_plui_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_plui_h_negative-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_allones_v2i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_build_vector_i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pli_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pli_b_v4i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_plui_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_plui_h_negative-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_allones_v4i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_build_vector_i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.