fallback: legalize: G_EXTRACT_VECTOR_ELT s8,<8 x s8>,s32

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_EXTRACT_VECTOR_ELT s8,<8 x s8>,s32 NEW
Occurrences:23 in 17 configs, 12 test files
Snippet from:narrow-shl-cst.6e5b69e1c9.ll (mutant of narrow-shl-cst.ll) @test3 via llvm-extract + llvm-reduce
Config:-mtriple=riscv32
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/3nWGajqs5 (llc-assertions-trunk, checked 2026-10-14 11:04 UTC): G reproduces

Snippet:

define i8 @test3(i64 %x) {
  %E = extractelement <8 x i8> zeroinitializer, i64 %x
  ret i8 %E
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*09remark: <unknown>:0:0: unable to legalize instruction: %3:_(s8) = G_EXTRACT_VECTOR_ELT %4:_(<8 x s8>), %6:_(s32) (in function: test3)
warning: Instruction selection used fallback path for test3
SelectionDAG (control)-mtriple=riscv32 -global-isel=009-

Reproduce:

llc -mtriple=riscv32 -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s8) = G_EXTRACT_VECTOR_ELT %4:_(<8 x s8>), %6:_(s32) (in function: test3)
warning: Instruction selection used fallback path for test3

Occurrences (23):

InputFunctionConfig
add-imm.06677969f0.ll (mutant of add-imm.ll)add_positive_high_bound_accept-mtriple=riscv32 -verify-machineinstrs
branch.a47ba2e4a4.ll (mutant of branch.ll)foo-mtriple=riscv32 -verify-machineinstrs -block-placement-predecessor-limit=10
branch.ac9328ce7e.ll (mutant of branch.ll)foo-mtriple=riscv32 -verify-machineinstrs
ctz_zero_return_test.677d9c65cc.ll (mutant of ctz_zero_return_test.ll)ctz1-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
ctz_zero_return_test.bd29369eff.ll (mutant of ctz_zero_return_test.ll)ctz1-mtriple=riscv32 -verify-machineinstrs
half-zfa-fli.b4ad190cf5.ll (mutant of half-zfa-fli.ll)loadfpimm3-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa-fli.d0dd55c3cc.ll (mutant of half-zfa-fli.ll)loadfpimm3-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfh
inline-asm.0fd2378a6a.ll (mutant of inline-asm.ll)constraint_cr-mtriple=riscv32 -verify-machineinstrs -no-integrated-as
llvm.frexp.7efce228ee.ll (mutant of llvm.frexp.ll)test_frexp_f16_i32_only_use_exp-mtriple=riscv32 -verify-machineinstrs
llvm.frexp.c57cefb60f.ll (mutant of llvm.frexp.ll)test_frexp_f16_i32_only_use_exp-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
llvm.frexp.cd3d8b0ec4.ll (mutant of llvm.frexp.ll)test_frexp_f16_i32_only_use_exp-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32
narrow-shl-cst.6e5b69e1c9.ll (mutant of narrow-shl-cst.ll)test3-mtriple=riscv32
rv32zba.380ab2b94b.ll (mutant of rv32zba.ll)mul_neg7-mtriple=riscv32 -mattr=+m,+xandesperf -verify-machineinstrs
rv32zba.5e7558b657.ll (mutant of rv32zba.ll)mul_neg7-mtriple=riscv32 -mattr=+m -verify-machineinstrs
rv32zba.89df249b9b.ll (mutant of rv32zba.ll)mul_neg7-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
select-constant-xor.36d93025cd.ll (mutant of select-constant-xor.ll)selecti64i32-mtriple=riscv32
shadowcallstack.0f16dabfad.ll (mutant of shadowcallstack.ll)f3-mtriple=riscv32 -verify-machineinstrs -mattr=+zcmp,+zimop
shadowcallstack.2ed738b8d1.ll (mutant of shadowcallstack.ll)f3-mtriple=riscv32 -verify-machineinstrs
shadowcallstack.60262bc676.ll (mutant of shadowcallstack.ll)f3-mtriple=riscv32 -mattr=+zimop,+zcmop -M no-aliases -verify-machineinstrs
shadowcallstack.686065b842.ll (mutant of shadowcallstack.ll)f3-mtriple=riscv32 -mattr=+zimop -verify-machineinstrs
tail-calls.005219146d.ll (mutant of tail-calls.ll)caller_extern_pgso-mtriple=riscv32 -verify-machineinstrs
tail-calls.759e4383e7.ll (mutant of tail-calls.ll)caller_extern_pgso-code-model=large -mtriple=riscv32 -verify-machineinstrs
zero-call-used-regs.25348b8cde.ll (mutant of zero-call-used-regs.ll)used_gpr-verify-machineinstrs -mtriple=riscv32-unknown-unknown

Generated 2026-10-15 08:05 UTC.