fallback: legalize: G_EXTRACT_VECTOR

fallback: legalize: G_EXTRACT_VECTOR_ELT s8,<8 x s8>,s64

Run:	main-04ca53e65f-20261014-105623
Kind:	fallback
Category:	legalize: G_EXTRACT_VECTOR_ELT s8,<8 x s8>,s64
Occurrences:	23 in 16 configs, 13 test files
Snippet from:	rvp-simd-64.ll @test_extract_vector_8 via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define i8 @test_extract_vector_8(<8 x i8> %a) {
  %extracted = extractelement <8 x i8> %a, i32 0
  ret i8 %extracted
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s8) = G_EXTRACT_VECTOR_ELT %0:_(<8 x s8>), %2:_(s64) (in function: test_extract_vector_8)
warning: Instruction selection used fallback path for test_extract_vector_8

Occurrences (23):

Input	Function	Config
rvp-simd-64.ll	test_extract_vector_8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
add-imm.fa2a4c227a.ll (mutant of add-imm.ll)	add_positive_high_bound_accept	`-mtriple=riscv64 -verify-machineinstrs`
add_sext_shl_constant.17dac38f78.ll (mutant of add_sext_shl_constant.ll)	add_sext_shl_moreOneUse_sext	`-mtriple=riscv64`
add_sext_shl_constant.45ad3d7690.ll (mutant of add_sext_shl_constant.ll)	add_sext_shl_moreOneUse_sext	`-mtriple=riscv64 -mattr=+zba`
add_sext_shl_constant.f54833f272.ll (mutant of add_sext_shl_constant.ll)	add_sext_shl_moreOneUse_sext	`-mtriple=riscv64 -mattr=+xandesperf`
ctz_zero_return_test.4d9a24383b.ll (mutant of ctz_zero_return_test.ll)	ctz1	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
ctz_zero_return_test.f44fb60936.ll (mutant of ctz_zero_return_test.ll)	ctz1	`-mtriple=riscv64 -verify-machineinstrs`
half-zfa-fli.308fbec65c.ll (mutant of half-zfa-fli.ll)	loadfpimm3	`-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfh`
half-zfa-fli.55749625d5.ll (mutant of half-zfa-fli.ll)	loadfpimm3	`-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin`
inline-asm.d331822675.ll (mutant of inline-asm.ll)	constraint_cr	`-mtriple=riscv64 -verify-machineinstrs -no-integrated-as`
llvm.frexp.a2c462e666.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.df48a954ac.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.ece47eef2d.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
narrow-shl-cst.f7cc8cc5e3.ll (mutant of narrow-shl-cst.ll)	test3	`-mtriple=riscv64`
rv64-stackmap.dc5c7cd3c6.ll (mutant of rv64-stackmap.ll)	osrcold	`-mtriple=riscv64`
select-constant-xor.a43c09cb69.ll (mutant of select-constant-xor.ll)	selecti64i32	`-mtriple=riscv64`
shadowcallstack.18f12b80c6.ll (mutant of shadowcallstack.ll)	f3	`-mtriple=riscv64 -mattr=+zimop,+zcmop -M no-aliases -verify-machineinstrs`
shadowcallstack.5613a22991.ll (mutant of shadowcallstack.ll)	f3	`-mtriple=riscv64 -mattr=+zimop -verify-machineinstrs`
shadowcallstack.69366504aa.ll (mutant of shadowcallstack.ll)	f3	`-mtriple=riscv64 -verify-machineinstrs`
shadowcallstack.960ba3917e.ll (mutant of shadowcallstack.ll)	f3	`-mtriple=riscv64 -verify-machineinstrs -mattr=+zcmp,+zimop,+zcmop`
tail-calls.532ab54071.ll (mutant of tail-calls.ll)	caller_extern_pgso	`-mtriple=riscv64 -verify-machineinstrs`
tail-calls.a36557010e.ll (mutant of tail-calls.ll)	caller_extern_pgso	`-code-model=large -mtriple=riscv64 -verify-machineinstrs`
zero-call-used-regs.332a70fead.ll (mutant of zero-call-used-regs.ll)	used_gpr	`-verify-machineinstrs -mtriple=riscv64-unknown-unknown`

Generated 2026-10-15 08:05 UTC.