fallback: legalize: G

fallback: legalize: G_FADD s16

Run:	main-04ca53e65f-20261014-105623
Kind:	fallback
Category:	legalize: G_FADD s16
Occurrences:	177 in 40 configs, 12 test files
Snippet from:	half-zfa.ll @fadd_neg_0p5 via llvm-extract
Config:	`-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define half @fadd_neg_0p5(half %x) {
  %a = fadd half %x, -5.000000e-01
  ret half %a
}

Reproduce:

llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FADD %0:_, %1:_ (in function: fadd_neg_0p5)
warning: Instruction selection used fallback path for fadd_neg_0p5

Occurrences (177) (first 50):

Input	Function	Config
fp16-promote.ll	test_fadd	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
half-arith.ll	fadd_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fabs_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fmadd_h_contract	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fadd_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fabs_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fmadd_h_contract	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fadd_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fabs_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fmadd_h_contract	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fadd_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.ll	fabs_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.ll	fmadd_h_contract	`-mtriple=riscv64 -verify-machineinstrs`
half-imm.ll	half_imm_op	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-imm.ll	half_imm_op	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_imm_op	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_imm_op	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-imm.ll	half_imm_op	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_imm_op	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	sincos_f16	`-mtriple=riscv64 -verify-machineinstrs`
half-intrinsics.ll	fmuladd_f16	`-mtriple=riscv64 -verify-machineinstrs`
half-mem.ll	flh	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	fsh	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	flh_fsh_global	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	flh_fsh_constant	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	flh_stack	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	fsh_stack	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-mem.ll	flh	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	fsh	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_fsh_global	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_fsh_constant	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_stack	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	fsh_stack	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	fsh	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_fsh_global	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_fsh_constant	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh_stack	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	fsh_stack	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-mem.ll	flh	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`

Generated 2026-10-15 08:05 UTC.