fallback: legalize: G_FPOW s16

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_FPOW s16
Occurrences:28 in 18 configs, 1 test files
Snippet from:half-intrinsics.ll @pow_f16 via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @pow_f16(half %a, half %b) #0 {
  %1 = call half @llvm.pow.f16(half %a, half %b)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.pow.f16(half, half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FPOW %0:_, %1:_ (in function: pow_f16)
warning: Instruction selection used fallback path for pow_f16

Occurrences (28):

InputFunctionConfig
half-intrinsics.llpow_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.llpow_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.llpow_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.llpow_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.llpow_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.llpow_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d
half-intrinsics.llpow_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.llpow_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.llpow_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.llpow_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.18d882e117.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.1d179549c4.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.28ede63fff.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.2c9f3fc96d.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.2f73fc0b9b.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.495239193f.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.4d1380ba7f.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.4f45a3f49d.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.6561aa17a2.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d
half-intrinsics.69bdb38ff1.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.9148628236.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.9d7a9a594d.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.a8fecd2d73.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.af076daaee.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.b8a94608d8.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.c1525cedf1.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.cfe13985a9.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.e663e30848.ll (mutant of half-intrinsics.ll)pow_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64

Generated 2026-10-15 08:05 UTC.