fallback: legalize: G_FSUB s16

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_FSUB s16
Occurrences:62 in 32 configs, 11 test files
Snippet from:half-arith.ll @fsub_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fsub_h(half %a, half %b) #0 {
  %1 = fsub half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FSUB %0:_, %1:_ (in function: fsub_h)
warning: Instruction selection used fallback path for fsub_h

Occurrences (62) (first 50):

InputFunctionConfig
half-arith.llfsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfsub_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfsub_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
bfloat-convert-half.8b47aca4f8.ll (mutant of bfloat-convert-half.ll)fcvt_bf16_h-mtriple=riscv64 -mattr=+zfhmin,+zfbfmin -verify-machineinstrs
bfloat-convert-half.9c31f68298.ll (mutant of bfloat-convert-half.ll)fcvt_bf16_h-mtriple=riscv32 -mattr=+zfhmin,+zfbfmin -verify-machineinstrs
half-arith.0d6495d22c.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.1dee3df396.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.22a0d14314.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.351bf0fcb9.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.39be797360.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.5e490fc778.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.603167bf62.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.78c1815341.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-bitmanip-dagcombines.2591709625.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv32 -verify-machineinstrs
half-bitmanip-dagcombines.2b23683df8.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.4d8871fbd1.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.7ba30d8ce5.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.89547141de.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.b7ffc651cf.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.d0145eb655.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv64 -verify-machineinstrs
half-bitmanip-dagcombines.db0d99abc4.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.f3984c5105.ll (mutant of half-bitmanip-dagcombines.ll)fneg-mtriple=riscv64 -target-abi lp64 -verify-machineinstrs
half-fcmp-strict.958f5645c5.ll (mutant of half-fcmp-strict.ll)fcmp_one-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-fcmp-strict.9747c0bd5a.ll (mutant of half-fcmp-strict.ll)fcmp_one-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-fcmp-strict.c1d21633f6.ll (mutant of half-fcmp-strict.ll)fcmp_one-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-fcmp-strict.e4b84923d0.ll (mutant of half-fcmp-strict.ll)fcmp_one-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-isnan.1c574e4e36.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-isnan.3538a5ed76.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-isnan.577bf89078.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-isnan.8c7a4d67ef.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-isnan.94cb486e45.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-isnan.e907bff4a7.ll (mutant of half-isnan.ll)half_is_nan-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-select-fcmp.7ff49aecd1.ll (mutant of half-select-fcmp.ll)select_fcmp_uno-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi=lp64f
half-select-fcmp.ccd04ed258.ll (mutant of half-select-fcmp.ll)select_fcmp_uno-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi=ilp32f
inline-asm-zhinx-constraint-r.086d02a96e.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=ilp32
inline-asm-zhinx-constraint-r.5cec275375.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi=lp64
inline-asm-zhinx-constraint-r.9ea2e1477e.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=lp64

Generated 2026-10-15 08:05 UTC.