fallback: legalize: G_FTAN s16

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_FTAN s16
Occurrences:28 in 18 configs, 1 test files
Snippet from:half-intrinsics.ll @tan_f16 via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @tan_f16(half %a) #0 {
  %1 = call half @llvm.tan.f16(half %a)
  ret half %1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.tan.f16(half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s16) = G_FTAN %0:_ (in function: tan_f16)
warning: Instruction selection used fallback path for tan_f16

Occurrences (28):

InputFunctionConfig
half-intrinsics.lltan_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.lltan_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.lltan_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.lltan_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.lltan_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.lltan_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d
half-intrinsics.lltan_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.lltan_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.lltan_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.lltan_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.2bc2ae8eab.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.3aa927107d.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.3d3e1996ba.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.45eb8f823c.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.6b50a7bd89.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.6d0438c87e.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.8971f43962.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.8b5db98865.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.923b2455af.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.b06fc009ab.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.ba2d0f2a55.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.c9d9d2735c.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.dfafaadc48.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.e0496ef93f.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.e34c92e69d.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.e4c5668f94.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.f887668d80.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.fd5d2219da.ll (mutant of half-intrinsics.ll)tan_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d

Generated 2026-10-15 08:05 UTC.