fallback: legalize: G_INTRINSIC_W_SIDE

fallback: legalize: G_INTRINSIC_W_SIDE_EFFECTS s32,p0

Run:	main-04ca53e65f-20261014-105623
Kind:	fallback
Category:	legalize: G_INTRINSIC_W_SIDE_EFFECTS s32,p0
Occurrences:	88 in 8 configs, 3 test files
Snippet from:	atomic-rmw.ll @atomicrmw_nand_i8_monotonic via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i8 @atomicrmw_nand_i8_monotonic(ptr %a, i8 %b) #0 {
  %1 = atomicrmw nand ptr %a, i8 %b monotonic, align 1
  ret i8 %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %15:_(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.riscv.masked.atomicrmw.nand), %4:_(p0), %14:_(s32), %10:_(s32), 2 :: (volatile load store (s32) on %ir.AlignedAddr) (in function: atomicrmw_nand_i8_monotonic)
warning: Instruction selection used fallback path for atomicrmw_nand_i8_monotonic

Occurrences (88) (first 50):

Input	Function	Config
atomic-rmw.ll	atomicrmw_nand_i8_monotonic	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acquire	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_release	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acq_rel	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_seq_cst	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_monotonic	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acquire	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_release	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acq_rel	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_seq_cst	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_monotonic	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acquire	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_release	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acq_rel	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_seq_cst	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_monotonic	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acquire	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_release	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acq_rel	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_seq_cst	`-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_monotonic	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acquire	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_release	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acq_rel	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_seq_cst	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_monotonic	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acquire	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_release	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acq_rel	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_seq_cst	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_monotonic	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acquire	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_release	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acq_rel	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_seq_cst	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_monotonic	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acquire	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_release	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acq_rel	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_seq_cst	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_monotonic	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acquire	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_release	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_acq_rel	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i8_seq_cst	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_monotonic	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acquire	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_release	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_acq_rel	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_nand_i16_seq_cst	`-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.