fallback: legalize: G_LOAD <4 x s32>,p0

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:legalize: G_LOAD <4 x s32>,p0
Occurrences:167 in 80 configs, 51 test files
Snippet from:nontemporal.ll @test_nontemporal_load_v4i32 via llvm-extract
Config:-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i32> @test_nontemporal_load_v4i32(ptr %p) {
  %1 = load <4 x i32>, ptr %p, align 16, !nontemporal !0
  ret <4 x i32> %1
}

!0 = !{i32 1}

Reproduce:

llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s32>) = G_LOAD %0:_(p0) :: (non-temporal "riscv-nontemporal-domain-bit-0" "riscv-nontemporal-domain-bit-1" load (<4 x s32>) from %ir.p) (in function: test_nontemporal_load_v4i32)
warning: Instruction selection used fallback path for test_nontemporal_load_v4i32

Occurrences (167) (first 50):

InputFunctionConfig
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv32 -mattr=+v -relocation-model=pic -enable-tlsdesc
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv64 -mattr=+v -relocation-model=pic -enable-tlsdesc
abdu-neg.458253a4ed.ll (mutant of abdu-neg.ll)abd_ext_i8_undef-mtriple=riscv32 -mattr=+zbb
abdu-neg.47cc80767e.ll (mutant of abdu-neg.ll)abd_ext_i8_undef-mtriple=riscv32
abdu-neg.5eb66225e8.ll (mutant of abdu-neg.ll)abd_ext_i8_undef-mtriple=riscv64
abdu-neg.e0d9a8fce8.ll (mutant of abdu-neg.ll)abd_ext_i8_undef-mtriple=riscv64 -mattr=+zbb
analyze-branch.129b6ba015.ll (mutant of analyze-branch.ll)test_bcc_fallthrough_nottaken-mtriple=riscv32 -verify-machineinstrs
arith-with-overflow.b7208b9dbe.ll (mutant of arith-with-overflow.ll)uadd-mtriple=riscv32 -verify-machineinstrs
atomic-rmw-sub.0d35ec695b.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i32_neg-mtriple=riscv32 -verify-machineinstrs
atomic-rmw-sub.954ce2903c.ll (mutant of atomic-rmw-sub.ll)atomicrmw_sub_i32_neg-mtriple=riscv64 -mattr=+a -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.