fallback: legalize: G_LSHR <4 x s32>

Run:	main-04ca53e65f-20261014-105623
Kind:	fallback
Category:	legalize: G_LSHR <4 x s32>
Occurrences:	31 in 20 configs, 6 test files
Snippet from:	rvp-simd-64.ll @test_pasubu_h via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i16> @test_pasubu_h(<4 x i16> %a, <4 x i16> %b) {
  %a_ext = zext <4 x i16> %a to <4 x i32>
  %b_ext = zext <4 x i16> %b to <4 x i32>
  %sub = sub <4 x i32> %a_ext, %b_ext
  %res = lshr <4 x i32> %sub, splat (i32 1)
  %res_trunc = trunc <4 x i32> %res to <4 x i16>
  ret <4 x i16> %res_trunc
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<4 x s32>) = G_LSHR %4:_, %5:_(<4 x s32>) (in function: test_pasubu_h)
warning: Instruction selection used fallback path for test_pasubu_h

Occurrences (31):

Input	Function	Config
rvp-simd-64.ll	test_pasubu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulh_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhsu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhsu_h_commuted	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhr_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhru_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhrsu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhrsu_h_commuted	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulhu_v4i16	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
umulh.ll	umulh_v4i16	`-mtriple=riscv32 -mattr=+m`
umulh.ll	umulh_v4i16	`-mtriple=riscv64 -mattr=+m`
atomic-signext.3735b23352.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs`
atomic-signext.8e7edd6c7b.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv64 -verify-machineinstrs`
atomic-signext.a41f2af31a.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.a77a54ffff.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.a9f13964e7.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-signext.b3ec290d9e.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv32 -verify-machineinstrs`
atomic-signext.c718198e47.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-signext.ec0d6fabdd.ll (mutant of atomic-signext.ll)	atomicrmw_or_i8_monotonic	`-mtriple=riscv64 -mattr=+a -verify-machineinstrs`
inline-asm-abi-names.08f9933ce4.ll (mutant of inline-asm-abi-names.ll)	explicit_register_x4	`-mtriple=riscv32 -verify-machineinstrs -no-integrated-as`
inline-asm-abi-names.378896ba99.ll (mutant of inline-asm-abi-names.ll)	explicit_register_x4	`-mtriple=riscv64 -verify-machineinstrs -no-integrated-as`
umulh.c64d06b6a1.ll (mutant of umulh.ll)	umulh_v4i16	`-mtriple=riscv64 -mattr=+m`
umulh.ed142fb998.ll (mutant of umulh.ll)	umulh_v4i16	`-mtriple=riscv32 -mattr=+m`
xqcisls-merge-base-offset-shladd.a40d80a486.ll (mutant of xqcisls-merge-base-offset-shladd.ll)	store_scaled_i8	`-mtriple=riscv32 -mattr=+xqcili,+xqcisls,+zba,+xqciac -verify-machineinstrs`
zero-call-used-regs-fp.068fe13775.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv32-unknown-unknown -mattr=+i,+m,+Zfh,+q`
zero-call-used-regs-fp.31cf543ea4.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv64-unknown-unknown -mattr=+i,+m,+Zfh,+q`
zero-call-used-regs-fp.3da2188b5e.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv32-unknown-unknown -mattr=+i,+m,+Zfh,+d`
zero-call-used-regs-fp.4d4f06884e.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv64-unknown-unknown -mattr=+i,+m,+Zfh,+d`
zero-call-used-regs-fp.5176ee5939.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv64-unknown-unknown -mattr=+i,+m,+Zfh,+f`
zero-call-used-regs-fp.a765f8707b.ll (mutant of zero-call-used-regs-fp.ll)	all_fp	`-verify-machineinstrs -mtriple=riscv32-unknown-unknown -mattr=+i,+m,+Zfh,+f`

Generated 2026-10-15 08:05 UTC.