fallback: legalize: G_VECREDUCE_FADD s32,<4 x s32>

Snippet:

define float @add_f32(<4 x float> %a, <4 x float> %b) {
  %r1 = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> %a)
  %r2 = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> %b)
  %r = fadd fast float %r1, %r2
  ret float %r
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.vector.reduce.fadd.v4f32(float, <4 x float>) #0

attributes #0 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %8:_(s32) = nnan ninf nsz arcp contract afn reassoc G_VECREDUCE_FADD %1:_(<4 x s32>) (in function: add_f32)
warning: Instruction selection used fallback path for add_f32

Occurrences (2):

Generated 2026-10-15 08:05 UTC.