fallback: translate: call llvm.experimental.constrained.fptoui.i32.f64

Run:main-04ca53e65f-20261014-105623
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptoui.i32.f64
Occurrences:36 in 10 configs, 3 test files
Snippet from:double-convert-strict.ll @fcvt_wu_d via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i32 @fcvt_wu_d(double %a) #0 {
  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %a, metadata !"fpexcept.strict")
  ret i32 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptoui.i32.f64: '  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %a, metadata !"fpexcept.strict")' (in function: fcvt_wu_d)
warning: Instruction selection used fallback path for fcvt_wu_d

Occurrences (36):

InputFunctionConfig
double-convert-strict.llfcvt_wu_d-mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d
double-convert-strict.llfcvt_wu_d-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
double-convert-strict.llfcvt_wu_d-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
double-convert-strict.llfcvt_wu_d-mtriple=riscv64 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64d
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv64 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64d
double-convert-strict.llfcvt_wu_d-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
double-convert-strict.llfcvt_wu_d-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
double-convert-strict.llfcvt_wu_d_multiple_use-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
rv64d-double-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64d-double-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64d-double-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64i-double-softfloat.llstrict_fp64_to_ui32-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs
rv64i-double-softfloat.llstrict_fp64_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64d-double-convert-strict.067c5d334f.ll (mutant of rv64d-double-convert-strict.ll)aext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.1009386a5c.ll (mutant of rv64d-double-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64d-double-convert-strict.3c08252ae7.ll (mutant of rv64d-double-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.4484eca55c.ll (mutant of rv64d-double-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.761a948e07.ll (mutant of rv64d-double-convert-strict.ll)aext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64d-double-convert-strict.8c79b40199.ll (mutant of rv64d-double-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation
rv64d-double-convert-strict.b0e0b3abca.ll (mutant of rv64d-double-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64d-double-convert-strict.f8d5c45f24.ll (mutant of rv64d-double-convert-strict.ll)zext_fptoui-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation
rv64i-double-softfloat.3adeb326ac.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs
rv64i-double-softfloat.3c98a545bd.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs
rv64i-double-softfloat.41b782297c.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-double-softfloat.72e78c04cb.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-double-softfloat.a659cd00b5.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-double-softfloat.d00f8a0d76.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs
rv64i-double-softfloat.d29d159a1f.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -verify-machineinstrs
rv64i-double-softfloat.fbdec5b9d4.ll (mutant of rv64i-double-softfloat.ll)strict_fp64_to_ui32-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.