fallback: translate: urem <vscale x 1 x i64>

Snippet:

@G = external global i32

define void @test_reorder(<vscale x 1 x i64> %vreg) {
entry:
  %B = urem <vscale x 1 x i64> %vreg, %vreg
  call void @llvm.riscv.sf.vc.iv.se.i32.nxv1i64.i32.i32(i32 0, i32 0, <vscale x 1 x i64> %vreg, i32 0, i32 0)
  %0 = call i32 asm sideeffect "sf.vc.vv 0x3, 0x0, $1, $1;", "=r,^vr,~{memory},~{vl},~{sf.vcix_state}"(<vscale x 1 x i64> %vreg)
  %B1 = and i32 -2147483648, %0
  store i32 %0, ptr @G, align 4
  store <vscale x 1 x i64> %B, ptr poison, align 8
  store i32 %B1, ptr poison, align 4
  ret void
}

; Function Attrs: nounwind
declare void @llvm.riscv.sf.vc.iv.se.i32.nxv1i64.i32.i32(i32 immarg, i32 immarg, <vscale x 1 x i64>, i32 immarg, i32) #0

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+v,+xsfvcp -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+v,+xsfvcp -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: urem: '  %B = urem <vscale x 1 x i64> %vreg, %vreg' (in function: test_reorder)
warning: Instruction selection used fallback path for test_reorder

Occurrences (2):

Generated 2026-10-15 08:05 UTC.