crash: Assertion failed: (SrcTy.isVector() && "mismatched cast between vector and non-vector"), function validateTruncExt, file MachineIRBuilder.cpp

Run:main-04ca53e65f-20261014-113325
Kind:crash
Category:Assertion failed: (SrcTy.isVector() && "mismatched cast between vector and non-vector"), function validateTruncExt, file MachineIRBuilder.cpp
Occurrences:11 in 2 configs, 2 test files
Snippet from:calling-conv-vector-float.ll @callee_v2f32 via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/KaW5c63q1 (llc-assertions-trunk, checked 2026-10-14 11:03 UTC): G reproduces

Snippet:

define <2 x float> @callee_v2f32(<2 x float> %x) {
  ret <2 x float> %x
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*1340llc: /root/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
SelectionDAG (control)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=001-

Reproduce:

llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

llc: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(const LLT, const LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/build/bin/llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* -o -
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'IRTranslator' on function '@callee_v2f32'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x000056251996f79b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 43
1  llc       0x000056251996c641 llvm::sys::RunSignalHandlers() + 369
2  llc       0x000056251997021b
3  libc.so.6 0x00007f3f49c45330
4  libc.so.6 0x00007f3f49c9ec0c pthread_kill + 284
5  libc.so.6 0x00007f3f49c4527e gsignal + 30
6  libc.so.6 0x00007f3f49c288ff abort + 223
7  libc.so.6 0x00007f3f49c2881b
8  libc.so.6 0x00007f3f49c3b517
9  llc       0x000056251bacb169 llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool) + 905
10 llc       0x000056251bacc012 llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3314
11 llc       0x000056251b9e5153 llvm::CSEMIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3091
12 llc       0x000056251bac9a91 llvm::MachineIRBuilder::buildTrunc(llvm::DstOp const&, llvm::SrcOp const&, std::optional<unsigned int>) + 33
13 llc       0x000056251ab8c4da
14 llc       0x000056251b9daee0 llvm::CallLowering::handleAssignments(llvm::CallLowering::ValueHandler&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::CCState&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>) const + 928
15 llc       0x000056251ab896ec
16 llc       0x000056251ba47260 llvm::IRTranslatorImpl::runOnMachineFunction(llvm::MachineFunction&, llvm::function_ref<llvm::GISelCSEInfo* ()>, bool, llvm::function_ref<llvm::AAResults* ()>, llvm::function_ref<llvm::BranchProbabilityInfo* ()>, llvm::function_ref<llvm::AssumptionCache* ()>, llvm::TargetLibraryInfo*, llvm::LibcallLoweringInfo const*, llvm::SSPLayoutInfo*) + 3552
17 llc       0x000056251ba4850d llvm::IRTranslatorLegacy::runOnMachineFunction(llvm::MachineFunction&) + 733
18 llc       0x0000562519f36d2d llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 653
19 llc       0x0000562519cc6cd7 llvm::FPPassManager::runOnFunction(llvm::Function&) + 871
20 llc       0x0000562519ccf1d2 llvm::FPPassManager::runOnModule(llvm::Module&) + 50
21 llc       0x0000562519cc7a80 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 2000
22 llc       0x0000562519976df8 llcMain + 12056
23 llc       0x00005625198b262f main + 63
24 libc.so.6 0x00007f3f49c2a1ca
25 libc.so.6 0x00007f3f49c2a28b __libc_start_main + 139
26 llc       0x00005625198b2525 _start + 37

Occurrences (11):

InputFunctionConfig
calling-conv-vector-float.ll-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
fastcc-half.ll-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
calling-conv-vector-float.273419ccbd.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.6706ac67e4.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.9bb61270ab.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.ddddc36b36.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.e72a71a054.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
fastcc-half.250e9f6ffa.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.5ab7cd7aac.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.7ae41882d4.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.c661e092d3.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.