fallback: legalize: G_ASHR <2 x s64>

Run:	main-04ca53e65f-20261014-113325
Kind:	fallback
Category:	legalize: G_ASHR <2 x s64>
Occurrences:	21 in 15 configs, 5 test files
Snippet from:	rvp-simd-64.ll @test_paadd_w via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i32> @test_paadd_w(<2 x i32> %a, <2 x i32> %b) {
  %ext.a = sext <2 x i32> %a to <2 x i64>
  %ext.b = sext <2 x i32> %b to <2 x i64>
  %add = add nsw <2 x i64> %ext.a, %ext.b
  %shift = ashr <2 x i64> %add, splat (i64 1)
  %res = trunc <2 x i64> %shift to <2 x i32>
  ret <2 x i32> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<2 x s64>) = G_ASHR %4:_, %5:_(<2 x s64>) (in function: test_paadd_w)
warning: Instruction selection used fallback path for test_paadd_w

Occurrences (21):

Input	Function	Config
rvp-simd-64.ll	test_paadd_w	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pasub_w	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pmulh_v2i32	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
smulh.ll	smulh_v2i32	`-mtriple=riscv32 -mattr=+m`
smulh.ll	smulh_v2i32	`-mtriple=riscv64 -mattr=+m`
bittest.7dee613cbb.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv32 -mattr=+xtheadbs -verify-machineinstrs`
bittest.9e6b5c48ed.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv32 -verify-machineinstrs`
bittest.b3be3fd2a1.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv32 -mattr=+zbs -verify-machineinstrs`
bittest.c7b4bf169c.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv64 -verify-machineinstrs`
bittest.d0d0d5a90d.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv64 -mattr=+zbs -verify-machineinstrs`
bittest.eb3ab948f8.ll (mutant of bittest.ll)	bit_11_1_nz_branch_i64	`-mtriple=riscv64 -mattr=+xtheadbs -verify-machineinstrs`
float-intrinsics.135a905a49.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv32 -verify-machineinstrs`
float-intrinsics.246d6210fa.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f`
float-intrinsics.4bb4d5337b.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32f`
float-intrinsics.6786a2c88f.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv64 -verify-machineinstrs`
float-intrinsics.8a69039628.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f`
float-intrinsics.cffc489bd9.ll (mutant of float-intrinsics.ll)	exp10_f32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
smulh.7077678c78.ll (mutant of smulh.ll)	smulh_v2i32	`-mtriple=riscv32 -mattr=+m`
smulh.7283c3de45.ll (mutant of smulh.ll)	smulh_v2i32	`-mtriple=riscv64 -mattr=+m`
xtheadmemidx.438ec2a59b.ll (mutant of xtheadmemidx.ll)	lwia	`-mtriple=riscv64 -mattr=+d,+xtheadmemidx -verify-machineinstrs`
xtheadmemidx.fe0b5da9eb.ll (mutant of xtheadmemidx.ll)	lwia	`-mtriple=riscv32 -mattr=+d,+xtheadmemidx -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.