fallback: legalize: G_ATOMICRMW_NAND s32,p0

Run:main-04ca53e65f-20261014-113325
Kind:fallback
Category:legalize: G_ATOMICRMW_NAND s32,p0
Occurrences:76 in 14 configs, 3 test files
Snippet from:forced-atomics.ll @rmw32_nand_seq_cst via llvm-extract
Config:-mtriple=riscv32 -mattr=+forced-atomics
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i32 @rmw32_nand_seq_cst(ptr %p) #0 {
  %v = atomicrmw nand ptr %p, i32 1 seq_cst, align 4
  ret i32 %v
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+forced-atomics -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+forced-atomics -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s32) = G_ATOMICRMW_NAND %0:_(p0), %2:_ :: (load store seq_cst (s32) on %ir.p) (in function: rmw32_nand_seq_cst)
warning: Instruction selection used fallback path for rmw32_nand_seq_cst

Occurrences (76) (first 50):

InputFunctionConfig
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv32 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv32 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_monotonic-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acquire-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_release-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_acq_rel-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-rmw.llatomicrmw_nand_i32_seq_cst-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.