fallback: legalize: G

fallback: legalize: G_FDIV s16

Run:	main-04ca53e65f-20261014-113325
Kind:	fallback
Category:	legalize: G_FDIV s16
Occurrences:	29 in 17 configs, 6 test files
Snippet from:	half-arith.ll @fdiv_h via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fdiv_h(half %a, half %b) #0 {
  %1 = fdiv half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FDIV %0:_, %1:_ (in function: fdiv_h)
warning: Instruction selection used fallback path for fdiv_h

Occurrences (29):

Input	Function	Config
half-arith.ll	fdiv_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fdiv_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fdiv_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fdiv_h	`-mtriple=riscv64 -verify-machineinstrs`
rv32i-rv64i-half.ll	half_test	`-mtriple=riscv32 -verify-machineinstrs`
rv32i-rv64i-half.ll	half_test	`-mtriple=riscv64 -verify-machineinstrs`
half-select-fcmp.84e7b4d21d.ll (mutant of half-select-fcmp.ll)	select_fcmp_ogt	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi=lp64f`
half-select-fcmp.e7f5371c21.ll (mutant of half-select-fcmp.ll)	select_fcmp_ogt	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi=ilp32f`
rv32i-rv64i-half.113c39381d.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv64 -verify-machineinstrs`
rv32i-rv64i-half.1df336a141.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv32 -verify-machineinstrs`
rv32i-rv64i-half.30bdcea4db.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv64 -verify-machineinstrs`
rv32i-rv64i-half.593565bc7e.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv32 -verify-machineinstrs`
rv32i-rv64i-half.5c33ee4775.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv32 -verify-machineinstrs`
rv32i-rv64i-half.89bbf08d76.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv32 -verify-machineinstrs`
rv32i-rv64i-half.aabf53343a.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv64 -verify-machineinstrs`
rv32i-rv64i-half.c52cf5715b.ll (mutant of rv32i-rv64i-half.ll)	half_test	`-mtriple=riscv64 -verify-machineinstrs`
zfh-half-intrinsics.72de9e7d7f.ll (mutant of zfh-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
zfh-half-intrinsics.d3722bb2c0.ll (mutant of zfh-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=zhinx -verify-machineinstrs -target-abi ilp32`
zfh-half-intrinsics.e5ca72880c.ll (mutant of zfh-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=zhinx -verify-machineinstrs -target-abi lp64`
zfh-half-intrinsics.f7e6c103f7.ll (mutant of zfh-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
zfhmin-half-intrinsics.19e2b717e6.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
zfhmin-half-intrinsics.8001045a6b.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
zfhmin-half-intrinsics.85dc62de0a.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
zfhmin-half-intrinsics.880c55b88a.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
zfhmin-half-intrinsics.b442447865.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
zfhmin-half-intrinsics.bd6a6a7fd0.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
zfhmin-half-intrinsics.f5104c522b.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
zfhmin-half-intrinsics.febf9007cc.ll (mutant of zfhmin-half-intrinsics.ll)	lround_i32_f16	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
zicond-fp-select-zfinx.0898d36bb9.ll (mutant of zicond-fp-select-zfinx.ll)	select_i1_half_0	`-mtriple=riscv64 -mattr=+f,+d -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.