fallback: legalize: G_FPEXT s128,s16

Run:	main-04ca53e65f-20261014-113325
Kind:	fallback
Category:	legalize: G_FPEXT s128,s16
Occurrences:	14 in 14 configs, 1 test files
Snippet from:	half-convert.ll @fcvt_q_h via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define fp128 @fcvt_q_h(ptr %x) {
  %a = load half, ptr %x, align 2
  %b = fpext half %a to fp128
  ret fp128 %b
}

Reproduce:

llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s128) = G_FPEXT %2:_(s16) (in function: fcvt_q_h)
warning: Instruction selection used fallback path for fcvt_q_h

Occurrences (14):

Input	Function	Config
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32d -verify-machineinstrs`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-convert.ll	fcvt_q_h	`-mtriple=riscv32 -verify-machineinstrs`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+d -target-abi=lp64d -verify-machineinstrs`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-convert.ll	fcvt_q_h	`-mtriple=riscv64 -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.