fallback: legalize: G_OR <4 x s32>
| Run: | main-04ca53e65f-20261014-113325 |
| Kind: | fallback |
| Category: | legalize: G_OR <4 x s32> |
| Occurrences: | 4 in 3 configs, 2 test files |
| Snippet from: | combine-is_fpclass.ll @extract_bitcast_oob_idx via llvm-extract |
| Config: | -mtriple=riscv64 -mattr=+v,+f,+d |
| Local check: | reproduces at 04ca53e65f |
| Compiler Explorer: | not uploaded (over --godbolt-limit or disabled) |
Snippet:
; Function Attrs: nounwind
define i1 @extract_bitcast_oob_idx(<4 x i32> %bits, ptr %p) #0 {
%masked = or <4 x i32> %bits, <i32 -2147483648, i32 0, i32 -2147483648, i32 0>
%fvec = bitcast <4 x i32> %masked to <4 x float>
store <4 x float> %fvec, ptr %p, align 16
%elt = extractelement <4 x float> %fvec, i32 6
%res = call i1 @llvm.is.fpclass.f32(float %elt, /* (nan) */ i32 3)
ret i1 %res
}
; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i1 @llvm.is.fpclass.f32(float, i32 immarg) #1
attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
Reproduce:
llc -mtriple=riscv64 -mattr=+v,+f,+d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+v,+f,+d -global-isel=0 snippet.ll -o -
Local llc output:
remark: <unknown>:0:0: unable to legalize instruction: %6:_(<4 x s32>) = G_OR %0:_, %3:_ (in function: extract_bitcast_oob_idx)
warning: Instruction selection used fallback path for extract_bitcast_oob_idx
Occurrences (4):
| Input | Function | Config |
|---|
| combine-is_fpclass.ll | extract_bitcast_oob_idx | -mtriple=riscv64 -mattr=+v,+f,+d |
| combine-is_fpclass.9d83bfcdb0.ll (mutant of combine-is_fpclass.ll) | extract_bitcast_oob_idx | -mtriple=riscv64 -mattr=+v,+f,+d |
| double_reduct.69e6c99d48.ll (mutant of double_reduct.ll) | and_i32 | -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs |
| double_reduct.92783dfd06.ll (mutant of double_reduct.ll) | and_i32 | -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.