fallback: legalize: G_SELECT <4 x s16>,<4 x s1>

Run:main-04ca53e65f-20261014-113325
Kind:fallback
Category:legalize: G_SELECT <4 x s16>,<4 x s1>
Occurrences:16 in 2 configs, 2 test files
Snippet from:combine-storetomstore.ll @test_masked_store_success_v4i16 via llvm-extract
Config:-mtriple=riscv64-- -mattr=+m,+v,+f
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_masked_store_success_v4i16(<4 x i16> %x, ptr %ptr, <4 x i1> %mask) {
  %load = load <4 x i16>, ptr %ptr, align 32
  %sel = select <4 x i1> %mask, <4 x i16> %x, <4 x i16> %load
  store <4 x i16> %sel, ptr %ptr, align 32
  ret void
}

Reproduce:

llc -mtriple=riscv64-- -mattr=+m,+v,+f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64-- -mattr=+m,+v,+f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %6:_(<4 x s16>) = G_SELECT %2:_(<4 x s1>), %0:_, %5:_ (in function: test_masked_store_success_v4i16)
warning: Instruction selection used fallback path for test_masked_store_success_v4i16

Occurrences (16):

InputFunctionConfig
combine-storetomstore.lltest_masked_store_success_v4i16-mtriple=riscv64-- -mattr=+m,+v,+f
combine-storetomstore.lltest_masked_store_success_v4f16-mtriple=riscv64-- -mattr=+m,+v,+f
rvp-simd-64.lltest_psadd_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_psaddu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssub_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssubu_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssh1sadd_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssh1sadd_h_addself-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_psslai_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssla_hs-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pssla_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_smin_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_umin_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_smax_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_umax_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_vselect_v4i16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.