fallback: translate: phi <vscale x 4 x i8>

Run:main-04ca53e65f-20261014-113325
Kind:fallback
Category:translate: phi <vscale x 4 x i8>
Occurrences:7 in 1 configs, 1 test files
Snippet from:riscv-codegenprepare-asm.ll @widen_anyof_rdx via llvm-extract
Config:-mtriple=riscv64 -mattr=+v
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define i1 @widen_anyof_rdx(ptr %p, i64 %n) {
entry:
  br label %loop

loop:                                             ; preds = %loop, %entry
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %phi = phi <vscale x 4 x i1> [ zeroinitializer, %entry ], [ %rec, %loop ]
  %avl = sub i64 %n, %iv
  %evl = call i32 @llvm.experimental.get.vector.length.i64(i64 %avl, i32 4, i1 true)
  %gep = getelementptr i32, ptr %p, i64 %iv
  %x = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr %gep, <vscale x 4 x i1> splat (i1 true), i32 %evl)
  %cmp = icmp ne <vscale x 4 x i32> %x, zeroinitializer
  %rec = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> %cmp, <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> %phi, i32 %evl)
  %evl.zext = zext i32 %evl to i64
  %iv.next = add i64 %iv, %evl.zext
  %done = icmp sge i64 %iv.next, %n
  br i1 %done, label %exit, label %loop

exit:                                             ; preds = %loop
  %res = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> %rec)
  ret i1 %res
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.experimental.get.vector.length.i64(i64, i32 immarg, i1 immarg) #0

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1>) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read)
declare <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr captures(none), <vscale x 4 x i1>, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>, <vscale x 4 x i1>, i32) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }

Reproduce:

llc -mtriple=riscv64 -mattr=+v -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+v -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: phi: '  %0 = phi <vscale x 4 x i8> [ zeroinitializer, %entry ], [ %1, %loop ]' (in function: widen_anyof_rdx)
warning: Instruction selection used fallback path for widen_anyof_rdx

Occurrences (7):

InputFunctionConfig
riscv-codegenprepare-asm.llwiden_anyof_rdx-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.llwiden_anyof_rdx_use_in_loop-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.4e90814ce0.ll (mutant of riscv-codegenprepare-asm.ll)widen_anyof_rdx-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.d3b7574959.ll (mutant of riscv-codegenprepare-asm.ll)widen_anyof_rdx-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.d3b7574959.ll (mutant of riscv-codegenprepare-asm.ll)widen_anyof_rdx_use_in_loop-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.eb2d58bc67.ll (mutant of riscv-codegenprepare-asm.ll)widen_anyof_rdx-mtriple=riscv64 -mattr=+v
riscv-codegenprepare-asm.efcec296f3.ll (mutant of riscv-codegenprepare-asm.ll)widen_anyof_rdx-mtriple=riscv64 -mattr=+v

Generated 2026-10-15 08:05 UTC.