regression: +57 insts: test_ctlz_i64_zero_poison (ctlz-cttz-ctpop.ll)

Run:main-04ca53e65f-20261014-113325
Kind:regression
Category:+57 insts: test_ctlz_i64_zero_poison (ctlz-cttz-ctpop.ll)
Occurrences:1 in 1 configs, 1 test files
Snippet from:ctlz-cttz-ctpop.ll @test_ctlz_i64_zero_poison via llvm-extract
Config:-mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i64 @test_ctlz_i64_zero_poison(i64 %a) #0 {
  %tmp = call i64 @llvm.ctlz.i64(i64 %a, i1 true)
  ret i64 %tmp
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.ctlz.i64(i64, i1 immarg) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs -global-isel snippet.ll -o -
llc -mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Assembly diff (SelectionDAG vs GlobalISel):

--- sdag
+++ gisel
@@ -1,9 +1,66 @@
-bnez a1, .L0
-th.ff1 a0, a0
-addi a0, a0, 32
+lui a5, 349525
+addi a5, a5, 1365
+lui a4, 209715
+addi a4, a4, 819
+lui a3, 61681
+addi a3, a3, -241
+li a2, 32
+beqz a1, .L0
+srli a0, a1, 1
+or a0, a1, a0
+srli a1, a0, 2
+or a0, a0, a1
+srli a1, a0, 4
+or a0, a0, a1
+srli a1, a0, 8
+or a0, a0, a1
+srli a1, a0, 16
+or a0, a0, a1
+srli a1, a0, 1
+and a1, a1, a5
+sub a0, a0, a1
+srli a1, a0, 2
+and a1, a1, a4
+and a0, a0, a4
+add a0, a1, a0
+srli a1, a0, 4
+add a0, a1, a0
+and a0, a0, a3
+slli a1, a0, 8
+add a0, a0, a1
+slli a1, a0, 16
+add a0, a0, a1
+srli a0, a0, 24
+sub a0, a2, a0
 li a1, 0
 ret
 .L0:
-th.ff1 a0, a1
+srli a1, a0, 1
+or a0, a0, a1
+srli a1, a0, 2
+or a0, a0, a1
+srli a1, a0, 4
+or a0, a0, a1
+srli a1, a0, 8
+or a0, a0, a1
+srli a1, a0, 16
+or a0, a0, a1
+srli a1, a0, 1
+and a1, a1, a5
+sub a0, a0, a1
+srli a1, a0, 2
+and a1, a1, a4
+and a0, a0, a4
+add a0, a1, a0
+srli a1, a0, 4
+add a0, a1, a0
+and a0, a0, a3
+slli a1, a0, 8
+add a0, a0, a1
+slli a1, a0, 16
+add a0, a0, a1
+srli a0, a0, 24
+sub a2, a2, a0
+addi a0, a2, 32
 li a1, 0
 ret

Occurrences (1):

InputFunctionConfig
ctlz-cttz-ctpop.lltest_ctlz_i64_zero_poison-mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.