regression: +139 insts: muloti_test (umulo-128-legalisation-lowering.ll)

Run:main-04ca53e65f-20261014-113325
Kind:regression
Category:+139 insts: muloti_test (umulo-128-legalisation-lowering.ll)
Occurrences:1 in 1 configs, 1 test files
Snippet from:umulo-128-legalisation-lowering.409d956029.ll (mutant of umulo-128-legalisation-lowering.ll) @muloti_test via llvm-extract
Config:-mtriple=riscv32 -mattr=+m
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

@G = external global i32

; Function Attrs: nounwind memory(none)
define { i128, i8 } @muloti_test(i128 %l, i128 %r) #0 {
start:
  %A = alloca i128, align 8
  store i128 poison, ptr %A, align 4
  %B = ashr i128 %r, %l
  %0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2
  %1 = extractvalue { i128, i1 } %0, 0
  %2 = extractvalue { i128, i1 } %0, 1
  %3 = zext i1 %2 to i8
  %B2 = lshr i32 -2147483648, 42
  %4 = insertvalue { i128, i8 } poison, i128 %1, 0
  %5 = insertvalue { i128, i8 } %4, i8 %3, 1
  store i128 %B, ptr %A, align 4
  store i32 %B2, ptr @G, align 4
  ret { i128, i8 } %5
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1

attributes #0 = { nounwind memory(none) }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+m -global-isel snippet.ll -o -
llc -mtriple=riscv32 -mattr=+m -global-isel=0 snippet.ll -o -

Assembly diff (SelectionDAG vs GlobalISel):

--- sdag
+++ gisel
@@ -1,152 +1,309 @@
-addi sp, sp, -112
-sw ra, 108(sp)
-sw s0, 104(sp)
-sw s1, 100(sp)
-sw s2, 96(sp)
-sw s3, 92(sp)
-sw s4, 88(sp)
-sw s5, 84(sp)
-sw s6, 80(sp)
-sw s7, 76(sp)
-sw s8, 72(sp)
-sw s9, 68(sp)
-sw s10, 64(sp)
-sw s11, 60(sp)
-lw a3, 0(a2)
-lw a7, 4(a2)
-lw a4, 8(a2)
-lw a5, 12(a2)
-lw a2, 0(a1)
-lw t0, 4(a1)
-lw a6, 8(a1)
-lw a1, 12(a1)
-sw a3, 8(sp)
-sw a7, 12(sp)
-sw a4, 16(sp)
-sw a5, 20(sp)
-srli t1, a2, 3
-srai t2, a5, 31
-andi t1, t1, 12
-addi t3, sp, 8
-sw t2, 24(sp)
-sw t2, 28(sp)
-sw t2, 32(sp)
-sw t2, 36(sp)
-add t1, t3, t1
-lw t3, 4(t1)
-andi t2, a2, 31
-mul s0, t0, a3
-mulhu s1, a2, a3
-lw s2, 0(t1)
-lw t4, 8(t1)
-lw t6, 12(t1)
-mul s3, a2, a7
-slli t1, t3, 1
-xori t5, t2, 31
-mulhu s4, t0, a3
-mulhu s5, a2, a7
-srl t2, s2, a2
-sll t1, t1, t5
-or t2, t2, t1
-srl t3, t3, a2
-slli t1, t4, 1
-add s1, s0, s1
-sll s6, t1, t5
-add t1, s3, s1
-sltu s0, s1, s0
-sltu s1, t1, s3
+addi sp, sp, -96
+sw ra, 92(sp)
+sw s0, 88(sp)
+sw s1, 84(sp)
+sw s2, 80(sp)
+sw s3, 76(sp)
+sw s4, 72(sp)
+sw s5, 68(sp)
+sw s6, 64(sp)
+sw s7, 60(sp)
+sw s8, 56(sp)
+sw s9, 52(sp)
+sw s10, 48(sp)
+sw s11, 44(sp)
+sw a0, 20(sp)
+lw a3, 0(a1)
+lw a5, 8(a2)
+lw a6, 12(a2)
+li t1, 32
+neg t5, a3
+srl t2, a5, a3
+sll s0, a6, t5
+bltu a3, t1, .L0
+sra a7, a6, a3
+mv a0, a5
+bnez a3, .L1
+j .L2
+.L0:
+or a7, t2, s0
+mv a0, a5
+beqz a3, .L2
+.L1:
+mv a0, a7
+.L2:
+lw a4, 0(a2)
+lw t0, 4(a2)
+bltu a3, t1, .L3
+srai a2, a6, 31
+srl t4, t0, a3
+j .L4
+.L3:
+srl t3, a4, a3
+sll t4, t0, t5
+sra a2, a6, a3
+or t4, t3, t4
+.L4:
+li t6, 64
+mv t3, a4
+beqz a3, .L5
+mv t3, t4
+.L5:
+sub s1, t6, a3
+bltu a3, t1, .L6
+li t4, 0
+bgeu s1, t1, .L7
+.L8:
+neg s2, s1
+srl s2, a5, s2
+sll t5, a5, t5
+or s3, s2, s0
+j .L9
+.L6:
+srl t4, t0, a3
+bltu s1, t1, .L8
+.L7:
+li t5, 0
+sll s3, a5, s1
+.L9:
+addi s2, a3, -64
+mv s0, a6
+beqz s1, .L10
+mv s0, s3
+.L10:
+bltu s2, t1, .L11
+sra t2, a6, s2
+mv s1, a5
+bnez s2, .L12
+j .L13
+.L11:
+neg s1, s2
+sll s1, a6, s1
+or t2, t2, s1
+mv s1, a5
+beqz s2, .L13
+.L12:
+mv s1, t2
+.L13:
+bltu s2, t1, .L14
+srai s2, a6, 31
+bltu a3, t6, .L15
+j .L16
+.L14:
+sra s2, a6, a3
+bgeu a3, t6, .L16
+.L15:
+or s1, t3, t5
+or s2, t4, s0
+.L16:
+mv a7, a4
+mv t1, t0
+beqz a3, .L17
+mv a7, s1
+mv t1, s2
+.L17:
+sw t1, 12(sp)
+sw a7, 16(sp)
+lw s7, 4(a1)
+lw t4, 8(a1)
+lw t5, 12(a1)
+bltu a3, t6, .L18
+srai a0, a6, 31
+mv a2, a0
+.L18:
+sw a2, 0(sp)
+mulhu a1, a3, a4
+mul t6, a3, t0
+mulhu s0, s7, a4
+mulhu s1, a3, t0
+mul s2, s7, a4
+mul s3, a3, a5
+mul s4, s7, t0
+mul s5, t4, a4
+add a1, a1, t6
+add s0, s0, s1
+sltu t6, a1, t6
+add a1, a1, s2
+sw a1, 8(sp)
+sltu s1, s0, s1
+add s0, s0, s3
+sltu s2, a1, s2
+sltu s3, s0, s3
+add s0, s0, s4
+add s6, t6, s2
+add s1, s1, s3
+sltu t6, s0, s4
+mulhu s8, t4, a4
+add t6, s1, t6
+mulhu s9, s7, t0
+add s0, s0, s5
+mulhu s1, a3, a5
+sltu s3, s0, s5
+mul s2, a3, a6
+add s4, t6, s3
+add s0, s0, s6
+sw s0, 4(sp)
+sltu s0, s0, s6
+mul s3, s7, a5
 add s0, s4, s0
-add s1, s5, s1
-mul s3, t0, a7
-mul s7, a6, a3
-mul s5, a4, a2
-mulhu s8, t0, a7
-mul s9, a7, a6
-mul s10, a1, a3
-mul s11, t0, a4
-mul ra, a5, a2
-mulhu s2, a6, a3
-mulhu s4, a4, a2
-or t3, t3, s6
-add s1, s0, s1
-sltu s0, s1, s0
-add s1, s3, s1
-add s0, s8, s0
-sltu s6, s1, s3
-add s6, s0, s6
-add s3, s10, s9
-add s0, s7, s5
-add s5, ra, s11
-add s3, s2, s3
-add s5, s4, s5
-add s8, s3, s5
-sltu s7, s0, s7
-srl s9, t4, a2
-add s7, s8, s7
-slli s8, t6, 1
-add t4, s1, s0
-sltu s1, t4, s1
-add s7, s6, s7
-sll s0, s8, t5
-add t5, s7, s1
-or s0, s9, s0
-sra t6, t6, a2
-beq t5, s6, .L0
-sltu s1, t5, s6
-.L0:
-mulhu s6, a5, a2
-mulhu s7, t0, a4
-sltu s4, s5, s4
-snez t0, t0
-snez s5, a5
-mulhu s8, a1, a3
-sltu s2, s3, s2
-mulhu s3, a7, a6
-snez a7, a7
-snez s9, a1
-and t0, s5, t0
-and a7, s9, a7
-snez s5, s6
-snez s6, s7
-or t0, t0, s5
-or s4, s6, s4
-snez s5, s8
-or t0, t0, s4
-or a7, a7, s5
-snez s3, s3
-or s2, s3, s2
-or a4, a4, a5
-snez a4, a4
-or a1, a6, a1
-snez a1, a1
-mul a2, a2, a3
-or a3, a7, s2
-and a1, a1, a4
-or a1, a1, a3
-or a3, t0, s1
-or a1, a1, a3
-andi a1, a1, 1
-sw t2, 40(sp)
-sw t3, 44(sp)
-sw s0, 48(sp)
-sw t6, 52(sp)
-sw a2, 0(a0)
-sw t1, 4(a0)
-sw t4, 8(a0)
-sw t5, 12(a0)
-sb a1, 16(a0)
-lw ra, 108(sp)
-lw s0, 104(sp)
-lw s1, 100(sp)
-lw s2, 96(sp)
-lw s3, 92(sp)
-lw s4, 88(sp)
-lw s5, 84(sp)
-lw s6, 80(sp)
-lw s7, 76(sp)
-lw s8, 72(sp)
-lw s9, 68(sp)
-lw s10, 64(sp)
-lw s11, 60(sp)
-addi sp, sp, 112
+mul s5, t4, t0
+mul s4, t5, a4
+add s6, s8, s9
+sltu s8, s6, s9
+add s9, s6, s1
+sltu s10, s9, s1
+add s9, s9, s2
+add s8, s8, s10
+sltu s10, s9, s2
+add s8, s8, s10
+add s9, s9, s3
+sltu s10, s9, s3
+add s9, s9, s5
+mulhu s11, t5, a4
+mulhu ra, t4, t0
+add s8, s8, s10
+sltu s10, s9, s5
+add s8, s8, s10
+mulhu s10, s7, a5
+add s9, s9, s4
+mulhu t1, a3, a6
+sltu a2, s9, s4
+add s9, s9, s0
+add a2, s8, a2
+sltu s8, s9, s0
+add s11, s11, ra
+mul s9, s7, a6
+add a2, a2, s8
+sltu s8, s11, ra
+add s11, s11, s10
+mul ra, t4, a5
+sltu s10, s11, s10
+add s11, s11, t1
+add s8, s8, s10
+sltu t1, s11, t1
+add t1, s8, t1
+mul s8, t5, t0
+sltiu s10, s11, 0
+add s11, s11, s9
+add t1, t1, s10
+sltu s9, s11, s9
+add t1, t1, s9
+add s11, s11, ra
+mv t6, a4
+mulhu a4, t5, t0
+sltu s9, s11, ra
+mulhu ra, t4, a5
+add t1, t1, s9
+add s11, s11, s8
+sltu s8, s11, s8
+sltiu s9, s11, 0
+add s8, s8, s9
+mulhu t2, s7, a6
+add t1, t1, s8
+add s8, s11, a2
+mv s11, a4
+sltu a4, a4, a4
+add s11, s11, ra
+sltu a2, s8, a2
+sltu ra, s11, ra
+add a2, t1, a2
+add a4, a4, ra
+add s11, s11, t2
+mul t1, t4, a6
+sltu t2, s11, t2
+mul a7, t5, a5
+add a4, a4, t2
+mv s11, s11
+sltu t2, s11, zero
+sltiu t3, s11, 0
+add a4, a4, t2
+add t3, t3, t3
+add a4, a4, t3
+add s11, s11, t1
+mulhu t3, t5, a5
+add ra, s11, a7
+mv a1, a0
+mulhu a0, t4, a6
+sltu t1, s11, t1
+sltu a7, ra, a7
+sltiu s7, ra, 0
+add a4, a4, t1
+add a7, a7, s7
+add a4, a4, a7
+sltu t2, t3, t3
+add t1, t3, a0
+sltu a0, t1, a0
+add a0, t2, a0
+mv t1, t1
+mul a7, t5, a6
+sltu t2, t1, zero
+add a4, a4, s7
+add a0, a0, t2
+add ra, ra, a2
+mv t1, t1
+sltu a2, ra, a2
+sltu t2, t1, zero
+add a2, a4, a2
+add a0, a0, t2
+mulhu a4, t5, a6
+sltiu a6, t1, 0
+add t1, t1, a7
+add t3, a6, a6
+add a0, a0, t3
+sltu a7, t1, a7
+add a6, a6, a7
+sltiu a7, t1, 0
+add a0, a0, a6
+add a6, a7, a7
+add a6, a6, a7
+mv a4, a4
+add a0, a0, a6
+mv a4, a4
+add t1, t1, a2
+sltu a2, t1, a2
+add a0, a0, a2
+mv a4, a4
+add a0, a4, a0
+mul a2, a3, t6
+add s1, s1, s2
+add s3, s3, s5
+add s1, s6, s1
+add s3, s3, s4
+add s1, s1, s3
+or a3, s8, ra
+add s0, s1, s0
+or a3, a3, t1
+or a0, a3, a0
+lw a3, 16(sp)
+sw a3, 24(sp)
+lw a3, 12(sp)
+sw a3, 28(sp)
+sw a1, 32(sp)
+lw a1, 0(sp)
+sw a1, 36(sp)
+lui a1, %hi(G)
+sw zero, %lo(G)(a1)
+lw a3, 20(sp)
+sw a2, 0(a3)
+lw a1, 8(sp)
+sw a1, 4(a3)
+lw a1, 4(sp)
+sw a1, 8(a3)
+snez a0, a0
+sw s0, 12(a3)
+sb a0, 16(a3)
+lw ra, 92(sp)
+lw s0, 88(sp)
+lw s1, 84(sp)
+lw s2, 80(sp)
+lw s3, 76(sp)
+lw s4, 72(sp)
+lw s5, 68(sp)
+lw s6, 64(sp)
+lw s7, 60(sp)
+lw s8, 56(sp)
+lw s9, 52(sp)
+lw s10, 48(sp)
+lw s11, 44(sp)
+addi sp, sp, 96
 ret

Occurrences (1):

InputFunctionConfig
umulo-128-legalisation-lowering.409d956029.ll (mutant of umulo-128-legalisation-lowering.ll)muloti_test-mtriple=riscv32 -mattr=+m

Generated 2026-10-15 08:05 UTC.