fallback: legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>
Occurrences:10 in 2 configs, 2 test files
Snippet from:reduction-formation.ll @reduce_sum_4xi32 via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define i32 @reduce_sum_4xi32(<4 x i32> %v) {
  %e0 = extractelement <4 x i32> %v, i32 0
  %e1 = extractelement <4 x i32> %v, i32 1
  %e2 = extractelement <4 x i32> %v, i32 2
  %e3 = extractelement <4 x i32> %v, i32 3
  %add0 = add i32 %e0, %e1
  %add1 = add i32 %add0, %e2
  %add2 = add i32 %add1, %e3
  ret i32 %add2
}

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %8:_(s32) = G_EXTRACT_VECTOR_ELT %0:_(<4 x s32>), %9:_(s32) (in function: reduce_sum_4xi32)
warning: Instruction selection used fallback path for reduce_sum_4xi32

Occurrences (10):

InputFunctionConfig
double_reduct.llfmul_f32-mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs
double_reduct.llmul_i32-mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs
reduction-formation.llreduce_sum_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.llreduce_xor_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.llreduce_or_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.089696a00a.ll (mutant of reduction-formation.ll)reduce_or_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.2260f0f15a.ll (mutant of reduction-formation.ll)reduce_xor_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.aa7fe9eeca.ll (mutant of reduction-formation.ll)reduce_or_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.e5338b3540.ll (mutant of reduction-formation.ll)reduce_xor_4xi32-mtriple=riscv32 -verify-machineinstrs
reduction-formation.e5338b3540.ll (mutant of reduction-formation.ll)reduce_or_4xi32-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.