fallback: legalize: G_FFREXP s16,s32

Run:	main-bc8218b282-20261015-074651
Kind:	fallback
Category:	legalize: G_FFREXP s16,s32
Occurrences:	40 in 14 configs, 2 test files
Snippet from:	half-intrinsics.ll @frexp_half via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define { half, i32 } @frexp_half(half %x) #0 {
  %a = call { half, i32 } @llvm.frexp.f16.i32(half %x)
  ret { half, i32 } %a
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare { half, i32 } @llvm.frexp.f16.i32(half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s16), %2:_(s32) = G_FFREXP %0:_ (in function: frexp_half)
warning: Instruction selection used fallback path for frexp_half

Occurrences (40):

Input	Function	Config
half-intrinsics.ll	frexp_half	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	frexp_half	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	frexp_half	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	frexp_half	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	frexp_half	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.ll	frexp_half	`-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	frexp_half	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	frexp_half	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	frexp_half	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	frexp_half	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv32 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv32 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.ll	test_frexp_f16_i32	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32_only_use_fract	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.ll	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.0f8e8c200a.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -verify-machineinstrs`
llvm.frexp.196584e201.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.frexp.31ccf49938.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.3bf91aecfc.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.frexp.4eeeb776a8.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.5285249d4b.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -verify-machineinstrs`
llvm.frexp.5564121c8d.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -verify-machineinstrs`
llvm.frexp.61c26bc814.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
llvm.frexp.7ed3d39bf8.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
llvm.frexp.8d23f333e8.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
llvm.frexp.aea15a005a.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
llvm.frexp.b56ee0fd0e.ll (mutant of llvm.frexp.ll)	test_frexp_f16_i32_only_use_exp	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`

Generated 2026-10-15 08:05 UTC.