fallback: legalize: G_FMUL s16

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:legalize: G_FMUL s16
Occurrences:40 in 15 configs, 3 test files
Snippet from:half-arith.ll @fmul_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fmul_h(half %a, half %b) #0 {
  %1 = fmul half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FMUL %0:_, %1:_ (in function: fmul_h)
warning: Instruction selection used fallback path for fmul_h

Occurrences (40):

InputFunctionConfig
fp16-promote.lltest_fmul-mtriple=riscv32 -mattr +d -target-abi ilp32d
half-arith.llfmul_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfsgnjx_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfmul_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfsgnjx_f16-mtriple=riscv32 -verify-machineinstrs
half-arith.llfmul_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfsgnjx_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfmul_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfsgnjx_f16-mtriple=riscv64 -verify-machineinstrs
fp16-promote.a02887179a.ll (mutant of fp16-promote.ll)test_fmul-mtriple=riscv32 -mattr +d -target-abi ilp32d
half-arith.04ef595b6f.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -verify-machineinstrs
half-arith.0d6495d22c.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.109afb59d3.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.1dee3df396.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -verify-machineinstrs
half-arith.22a0d14314.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.240625360b.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.351bf0fcb9.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.39be797360.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -verify-machineinstrs
half-arith.3e8aa9e07c.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.5e490fc778.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.603167bf62.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.62f96e6f57.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.6d6389fb52.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.78c1815341.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.c6901c394f.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.fa46d1f488.ll (mutant of half-arith.ll)fmul_h-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.00f1b8f1a4.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.285ee03400.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.2ab925da48.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.3747d621eb.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.4434d42d83.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.48be7a4851.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.a46c2526dc.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.d08d49a6a3.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.d29128346f.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.de8d0c59eb.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.e293447060.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.e8f8af706b.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.f00db8918e.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.ff85a3dda2.ll (mutant of half-intrinsics.ll)sin_f16-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.