fallback: legalize: G_IMPLICIT

fallback: legalize: G_IMPLICIT_DEF <2 x s16>

Run:	main-bc8218b282-20261015-074651
Kind:	fallback
Category:	legalize: G_IMPLICIT_DEF <2 x s16>
Occurrences:	185 in 3 configs, 7 test files
Snippet from:	rvp-zip.ll @test_punzipe_v2i16 via llvm-extract
Config:	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i16> @test_punzipe_v2i16(<4 x i16> %a) {
  %r = shufflevector <4 x i16> %a, <4 x i16> poison, <2 x i32> <i32 0, i32 2>
  ret <2 x i16> %r
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<2 x s16>) = G_IMPLICIT_DEF (in function: test_punzipe_v2i16)
warning: Instruction selection used fallback path for test_punzipe_v2i16

Occurrences (185) (first 50):

Input	Function	Config
calling-conv-p-ext-vector.ll	test_cc_v2i16	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
calling-conv-p-ext-vector.ll	test_exhaust	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-bitreverse-zbkb.ll	test_bitreverse_v2i16	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb,+zbkb -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipu_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipru_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclip_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipr_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipr_v2i16_31	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipr_v2i16_32	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-clip.ll	pnclipu_v2i16_16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-shift.ll	pnsrl_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-shift.ll	pnsra_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-shift.ll	pnsrar_v2i16	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-shift.ll	pnsra_v2i16_31	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-narrowing-shift.ll	pnsra_v2i16_32	`-mtriple=riscv64 -mattr=+experimental-p -verify-machineinstrs`
rvp-simd-32.ll	test_padd_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psub_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_and_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_or_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_xor_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_andn_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_orn_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_xnor_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_not_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psadd_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psaddu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pssub_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pssubu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psh1add_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pssh1sadd_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pssh1sadd_h_addself	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_paadd_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_paaddu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pabs_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pdif_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pdifu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pasub_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pasubu_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_insert_vector_16	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_insert_vector_16_elem1	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pslli_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psslai_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_pssla_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psrli_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psrai_h	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psll_hs_vec_shamt	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psrl_hs_vec_shamt	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psra_hs_vec_shamt	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psll_s_u16x2	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-32.ll	test_psrl_s_u16x2	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.