fallback: legalize: G

fallback: legalize: G_INTRINSIC s32

Run:	main-bc8218b282-20261015-074651
Kind:	fallback
Category:	legalize: G_INTRINSIC s32
Occurrences:	305 in 23 configs, 27 test files
Snippet from:	rv32zksh-intrinsic.ll @sm3p0_i32 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+zksh -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i32 @sm3p0_i32(i32 %a) #0 {
  %val = call i32 @llvm.riscv.sm3p0(i32 %a)
  ret i32 %val
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.riscv.sm3p0(i32) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+zksh -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zksh -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s32) = G_INTRINSIC intrinsic(@llvm.riscv.sm3p0), %0:_(s32) (in function: sm3p0_i32)
warning: Instruction selection used fallback path for sm3p0_i32

Occurrences (305) (first 50):

Input	Function	Config
rv32p.ll	test_aadd_i32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_aaddu_u32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_asub_i32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_asubu_u32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_mulhr_i32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_mulhru_u32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_mulhsu_i32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32p.ll	test_mulhrsu_i32	`-mtriple=riscv32 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv32xandesperf.ll	ffb	`-mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs`
rv32xandesperf.ll	ffzmism	`-mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs`
rv32xandesperf.ll	ffmism	`-mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs`
rv32xandesperf.ll	flmism	`-mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs`
rv32zbkb-intrinsic.ll	brev8	`-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs`
rv32zbkb-intrinsic.ll	brev8_knownbits	`-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs`
rv32zbkb-intrinsic.ll	zip	`-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs`
rv32zbkb-intrinsic.ll	unzip	`-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs`
rv32zbkx-intrinsic.ll	xperm8	`-mtriple=riscv32 -mattr=+zbkx -verify-machineinstrs`
rv32zbkx-intrinsic.ll	xperm4	`-mtriple=riscv32 -mattr=+zbkx -verify-machineinstrs`
rv32zimop-intrinsic.ll	mopr0_32	`-mtriple=riscv32 -mattr=+zimop -verify-machineinstrs`
rv32zimop-intrinsic.ll	mopr31_32	`-mtriple=riscv32 -mattr=+zimop -verify-machineinstrs`
rv32zimop-intrinsic.ll	moprr0_32	`-mtriple=riscv32 -mattr=+zimop -verify-machineinstrs`
rv32zimop-intrinsic.ll	moprr7_32	`-mtriple=riscv32 -mattr=+zimop -verify-machineinstrs`
rv32zknd-intrinsic-autoupgrade.ll	aes32dsi	`-mtriple=riscv32 -mattr=+zknd -verify-machineinstrs`
rv32zknd-intrinsic-autoupgrade.ll	aes32dsmi	`-mtriple=riscv32 -mattr=+zknd -verify-machineinstrs`
rv32zknd-intrinsic.ll	aes32dsi	`-mtriple=riscv32 -mattr=+zknd -verify-machineinstrs`
rv32zknd-intrinsic.ll	aes32dsmi	`-mtriple=riscv32 -mattr=+zknd -verify-machineinstrs`
rv32zkne-intrinsic-autoupgrade.ll	aes32esi	`-mtriple=riscv32 -mattr=+zkne -verify-machineinstrs`
rv32zkne-intrinsic-autoupgrade.ll	aes32esmi	`-mtriple=riscv32 -mattr=+zkne -verify-machineinstrs`
rv32zkne-intrinsic.ll	aes32esi	`-mtriple=riscv32 -mattr=+zkne -verify-machineinstrs`
rv32zkne-intrinsic.ll	aes32esmi	`-mtriple=riscv32 -mattr=+zkne -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha256sig0_i32	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha256sig1_i32	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha256sum0_i32	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha256sum1_i32	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sig0l	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sig0h	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sig1l	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sig1h	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sum0r	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zknh-intrinsic.ll	sha512sum1r	`-mtriple=riscv32 -mattr=+zknh -verify-machineinstrs`
rv32zksed-intrinsic-autoupgrade.ll	sm4ks_i32	`-mtriple=riscv32 -mattr=+zksed -verify-machineinstrs`
rv32zksed-intrinsic-autoupgrade.ll	sm4ed_i32	`-mtriple=riscv32 -mattr=+zksed -verify-machineinstrs`
rv32zksed-intrinsic.ll	sm4ks_i32	`-mtriple=riscv32 -mattr=+zksed -verify-machineinstrs`
rv32zksed-intrinsic.ll	sm4ed_i32	`-mtriple=riscv32 -mattr=+zksed -verify-machineinstrs`
rv32zksh-intrinsic.ll	sm3p0_i32	`-mtriple=riscv32 -mattr=+zksh -verify-machineinstrs`
rv32zksh-intrinsic.ll	sm3p1_i32	`-mtriple=riscv32 -mattr=+zksh -verify-machineinstrs`
rv64p.ll	test_mulhr_i32	`-mtriple=riscv64 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv64p.ll	test_mulhru_u32	`-mtriple=riscv64 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv64p.ll	test_mulhsu_i32	`-mtriple=riscv64 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`
rv64p.ll	test_mulhrsu_i32	`-mtriple=riscv64 -mattr=+experimental-p,+zbb,+m -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.