| Input | Function | Config |
|---|
| combine-storetomstore.ll | test_masked_store_success_v4i16 | -mtriple=riscv64-- -mattr=+m,+v,+f |
| combine-storetomstore.ll | test_masked_store_success_v4f16 | -mtriple=riscv64-- -mattr=+m,+v,+f |
| rvp-simd-64.ll | test_psadd_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psaddu_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssub_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssubu_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssh1sadd_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssh1sadd_h_addself | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_psslai_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssla_hs | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pssla_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_smin_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_umin_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_smax_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_umax_h | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_vselect_v4i16 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.