fallback: legalize: G_STRICT_FMA s16

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:legalize: G_STRICT_FMA s16
Occurrences:104 in 8 configs, 1 test files
Snippet from:half-arith-strict.ll @fmadd_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define half @fmadd_h(half %a, half %b, half %c) #0 {
  %1 = call half @llvm.experimental.constrained.fma.f16(half %a, half %b, half %c, metadata !"round.dynamic", metadata !"fpexcept.strict") #2
  ret half %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare half @llvm.experimental.constrained.fma.f16(half, half, half, metadata, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }
attributes #2 = { strictfp }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s16) = G_STRICT_FMA %0:_, %1:_, %2:_ (in function: fmadd_h)
warning: Instruction selection used fallback path for fmadd_h

Occurrences (104) (first 50):

InputFunctionConfig
half-arith-strict.llfmadd_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfmsub_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmadd_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmadd_h_2-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmsub_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmsub_h_2-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfmadd_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfmsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmadd_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmadd_h_2-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfnmsub_h_2-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32f
half-arith-strict.llfmadd_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfmsub_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmadd_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmadd_h_2-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmsub_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmsub_h_2-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfmadd_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfmsub_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmadd_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmadd_h_2-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmsub_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfnmsub_h_2-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32
half-arith-strict.llfmadd_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfmsub_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmadd_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmadd_h_2-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmsub_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmsub_h_2-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfmadd_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfmsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmadd_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmadd_h_2-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfnmsub_h_2-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64f
half-arith-strict.llfmadd_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfmsub_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmadd_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmadd_h_2-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmsub_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmsub_h_2-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfmadd_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfmsub_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmadd_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmadd_h_2-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmsub_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.llfnmsub_h_2-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.063d91d41d.ll (mutant of half-arith-strict.ll)fmadd_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -disable-strictnode-mutation -target-abi lp64
half-arith-strict.06d2b4903d.ll (mutant of half-arith-strict.ll)fmadd_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -disable-strictnode-mutation -target-abi ilp32

Generated 2026-10-15 08:05 UTC.