fallback: legalize: G_UMULH s64

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:legalize: G_UMULH s64
Occurrences:34 in 10 configs, 11 test files
Snippet from:div.ll @udiv64_constant via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i64 @udiv64_constant(i64 %a) #0 {
  %1 = udiv i64 %a, 5
  ret i64 %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %11:_(s64) = G_UMULH %0:_, %8:_ (in function: udiv64_constant)
warning: Instruction selection used fallback path for udiv64_constant

Occurrences (34):

InputFunctionConfig
bitint-fp-conv-200.lltest_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
div.lludiv64_constant-mtriple=riscv32 -verify-machineinstrs
fp128.llfptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fpclamptosat.llstest_f64i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f64i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f32i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f32i64-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f64i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f64i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llstest_f32i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fpclamptosat.llustest_f32i64_mm-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
mul.llmuli128_m3840-mtriple=riscv32 -verify-machineinstrs
mul.llmuli128_m63-mtriple=riscv32 -verify-machineinstrs
mul.llmulhsu_i64-mtriple=riscv32 -verify-machineinstrs
umulh.llumulh_i64-mtriple=riscv32
umulh.llumulh_v1i64-mtriple=riscv32
urem-lkk.lldont_fold_urem_i64-mtriple=riscv32 -verify-machineinstrs
bitint-fp-conv-200.99c7233fcd.ll (mutant of bitint-fp-conv-200.ll)test_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
bitint-fp-conv-200.ad4377eb8f.ll (mutant of bitint-fp-conv-200.ll)test_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
bitint-fp-conv-200.ef9db54422.ll (mutant of bitint-fp-conv-200.ll)test_float_to_bitint_200-mtriple=riscv32 -verify-machineinstrs
condops.439c8f23b3.ll (mutant of condops.ll)zero2_seteq-mtriple=riscv32 -target-abi=ilp32f -mattr=+f,+zbs,+zicond
condops.a21005d443.ll (mutant of condops.ll)zero2_seteq-mtriple=riscv32 -target-abi=ilp32f -mattr=+f,+zbs
div.e19394eece.ll (mutant of div.ll)udiv64_constant-mtriple=riscv32 -verify-machineinstrs
float-imm.67fd8238b5.ll (mutant of float-imm.ll)poison-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
fp128.b26b124633.ll (mutant of fp128.ll)fptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fp128.f4e1a8cc32.ll (mutant of fp128.ll)fptosi_fp128_to_i96-mtriple=riscv32 -verify-machineinstrs
fpenv.cb65fb5ca0.ll (mutant of fpenv.ll)func_04-mtriple=riscv32 -mattr=+f -verify-machineinstrs
half-imm.0ce767f9cd.ll (mutant of half-imm.ll)poison-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-imm.4350d81703.ll (mutant of half-imm.ll)poison-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-imm.60926d88b8.ll (mutant of half-imm.ll)poison-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-imm.75fe6d8a7d.ll (mutant of half-imm.ll)poison-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
umulh.5a4874298d.ll (mutant of umulh.ll)umulh_i64-mtriple=riscv32
umulh.7504ed3113.ll (mutant of umulh.ll)umulh_i64-mtriple=riscv32
urem-lkk.5bc17297b1.ll (mutant of urem-lkk.ll)dont_fold_urem_i64-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.