fallback: legalize: G_XOR <8 x s8>

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:legalize: G_XOR <8 x s8>
Occurrences:165 in 106 configs, 45 test files
Snippet from:rvp-simd-64.ll @test_xor_b via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <8 x i8> @test_xor_b(<8 x i8> %a, <8 x i8> %b) {
  %res = xor <8 x i8> %a, %b
  ret <8 x i8> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_XOR %0:_, %1:_ (in function: test_xor_b)
warning: Instruction selection used fallback path for test_xor_b

Occurrences (165) (first 50):

InputFunctionConfig
rvp-simd-64.lltest_xor_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_xnor_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_not_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pabs_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
add-before-shl.4d916afdf7.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv32 -mattr=+c -verify-machineinstrs -M no-aliases
add-before-shl.775c05aeeb.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv32 -mattr=+zca -verify-machineinstrs -M no-aliases
add-before-shl.8998958726.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv64 -mattr=+c -verify-machineinstrs -M no-aliases
add-before-shl.ac444d7065.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv32 -verify-machineinstrs -M no-aliases
add-before-shl.ce0eb16c69.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv64 -mattr=+zca -verify-machineinstrs -M no-aliases
add-before-shl.da856dc72a.ll (mutant of add-before-shl.ll)add_wide_operand-mtriple=riscv64 -verify-machineinstrs -M no-aliases
align-loops.709ec27a8d.ll (mutant of align-loops.ll)test-mtriple=riscv64
align-loops.e86aa5cb97.ll (mutant of align-loops.ll)test-mtriple=riscv64 -align-loops=16
align-loops.ee108a750d.ll (mutant of align-loops.ll)test-mtriple=riscv64 -align-loops=32
and-shl.0ca4f2e3aa.ll (mutant of and-shl.ll)and_0xfff_shl_33-mtriple=riscv64 -verify-machineinstrs
and-shl.4fb4e26401.ll (mutant of and-shl.ll)and_0xfff_shl_33-mtriple=riscv32 -verify-machineinstrs
andn-zext-lowmask.87f04fa522.ll (mutant of andn-zext-lowmask.ll)andn_zext_lowmask_i64_i32_multiuse-mtriple=riscv64 -verify-machineinstrs
andn-zext-lowmask.950f005d80.ll (mutant of andn-zext-lowmask.ll)andn_zext_lowmask_i64_i32_multiuse-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
andn-zext-lowmask.a107cc665a.ll (mutant of andn-zext-lowmask.ll)andn_zext_lowmask_i64_i32_multiuse-mtriple=riscv32 -verify-machineinstrs
andn-zext-lowmask.f412fd02d4.ll (mutant of andn-zext-lowmask.ll)andn_zext_lowmask_i64_i32_multiuse-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs
branch-opt.47ca3ccae6.ll (mutant of branch-opt.ll)u_case2_a-mtriple=riscv64 -mattr=+zbs -O2 -verify-machineinstrs
branch-opt.a861a57272.ll (mutant of branch-opt.ll)u_case2_a-mtriple=riscv32 -mattr=+zbs -O2 -verify-machineinstrs
branch_zero.d4dde892e1.ll (mutant of branch_zero.ll)bar-mtriple=riscv64 -verify-machineinstrs
callee-saved-gprs.0be31c9b44.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -mattr=+d -target-abi lp64d -verify-machineinstrs
callee-saved-gprs.1997535e67.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+f -target-abi ilp32f -verify-machineinstrs
callee-saved-gprs.2fa883c72e.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs
callee-saved-gprs.716a246e1a.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs
callee-saved-gprs.732bfcd797.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zcmp -verify-machineinstrs -frame-pointer=all
callee-saved-gprs.793e46d014.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+d -target-abi ilp32f -verify-machineinstrs
callee-saved-gprs.81d1e1b583.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs -frame-pointer=all
callee-saved-gprs.92b836d206.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zilsd -target-abi ilp32e -verify-machineinstrs
callee-saved-gprs.a72e389b8e.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs
callee-saved-gprs.b079cbd800.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs
callee-saved-gprs.b690c9f8c2.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -verify-machineinstrs
callee-saved-gprs.bda15fd5ec.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -verify-machineinstrs
callee-saved-gprs.bf529aa92c.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -target-abi lp64e -verify-machineinstrs
callee-saved-gprs.c526ce0926.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -mattr=+zcmp -verify-machineinstrs
callee-saved-gprs.c64b58b297.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -verify-machineinstrs -frame-pointer=all
callee-saved-gprs.d52faff13f.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -mattr=+d -target-abi lp64f -verify-machineinstrs
callee-saved-gprs.e49270d558.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+zcmp -verify-machineinstrs
callee-saved-gprs.e59221414d.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs
callee-saved-gprs.e7c05a1d0e.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -verify-machineinstrs -frame-pointer=all
callee-saved-gprs.f3c01c4582.ll (mutant of callee-saved-gprs.ll)varargs-mtriple=riscv64 -mattr=+zcmp -verify-machineinstrs -frame-pointer=all
combine-clmul.ca51253926.ll (mutant of combine-clmul.ll)combine_i64_cmul_rhs-mtriple=riscv64 -mattr=+zbc
csr-first-use-cost.0cafd06097.ll (mutant of csr-first-use-cost.ll)Perl_sv_setnv-mtriple=riscv64
csr-first-use-cost.d5ee4d4e84.ll (mutant of csr-first-use-cost.ll)Perl_sv_setnv-mtriple=riscv64 -regalloc-csr-first-time-cost=0
double-arith.0f020d4f66.ll (mutant of double-arith.ll)fsgnjn_d-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
double-arith.fa618ce593.ll (mutant of double-arith.ll)fsgnjn_d-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-intrinsics.5d16ac8a01.ll (mutant of double-intrinsics.ll)fma_f64-mtriple=riscv32 -verify-machineinstrs
double-intrinsics.62638da690.ll (mutant of double-intrinsics.ll)fma_f64-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-intrinsics.b63ea93fd7.ll (mutant of double-intrinsics.ll)fma_f64-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32

Generated 2026-10-15 08:05 UTC.