fallback: translate: call llvm.experimental.constrained.fptosi.i16.f16

Run:main-bc8218b282-20261015-074651
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptosi.i16.f16
Occurrences:17 in 17 configs, 1 test files
Snippet from:half-convert-strict.ll @fcvt_si_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i16 @fcvt_si_h(half %a) #0 {
  %1 = call i16 @llvm.experimental.constrained.fptosi.i16.f16(half %a, metadata !"fpexcept.strict")
  ret i16 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i16 @llvm.experimental.constrained.fptosi.i16.f16(half, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptosi.i16.f16: '  %1 = call i16 @llvm.experimental.constrained.fptosi.i16.f16(half %a, metadata !"fpexcept.strict")' (in function: fcvt_si_h)
warning: Instruction selection used fallback path for fcvt_si_h

Occurrences (17):

InputFunctionConfig
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_si_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation

Generated 2026-10-15 08:05 UTC.