regression: +204 insts: keep_live (graalcc.ll)

Snippet:

@var = external global [30 x i64]
@G = external global float
@G.1 = external global i8
@G.2 = external global i8

define graalcc void @keep_live() {
  %LGV2 = load i8, ptr @G.1, align 1
  %C4 = fcmp uno double 4.940660e-324, 1.000000e+00
  %A = alloca i1, align 1
  %L = load i8, ptr %A, align 1
  store i1 poison, ptr %A, align 1
  %LGV = load float, ptr @G, align 4
  %val = load volatile [30 x i64], ptr @var, align 4
  %C = fcmp one float %LGV, f0x7F7FFFFF
  %B = sub i8 %L, %LGV2
  store volatile [30 x i64] %val, ptr @var, align 4
  store i1 %C, ptr %A, align 1
  store i8 %B, ptr @G.2, align 1
  store i1 %C4, ptr %A, align 1
  ret void
}

Reproduce:

llc -mtriple=riscv64 -global-isel snippet.ll -o -
llc -mtriple=riscv64 -global-isel=0 snippet.ll -o -

Assembly diff (SelectionDAG vs GlobalISel):

--- sdag
+++ gisel
@@ -1,108 +1,312 @@
-addi sp, sp, -160
-sd ra, 152(sp)
-sd s0, 144(sp)
-sd s1, 136(sp)
-sd s2, 128(sp)
-sd s3, 120(sp)
-sd s4, 112(sp)
-sd s5, 104(sp)
-sd s6, 96(sp)
-sd s8, 88(sp)
-sd s9, 80(sp)
-sd s10, 72(sp)
-lui a1, %hi(G.1)
-lbu a0, 71(sp)
-sd a0, 56(sp)
-lui a2, %hi(var)
-addi a2, a2, %lo(var)
-lbu a0, %lo(G.1)(a1)
-sd a0, 48(sp)
-ld a0, 0(a2)
-sd a0, 40(sp)
-ld a0, 8(a2)
+addi sp, sp, -304
+sd ra, 296(sp)
+sd s0, 288(sp)
+sd s1, 280(sp)
+sd s2, 272(sp)
+sd s3, 264(sp)
+sd s4, 256(sp)
+sd s5, 248(sp)
+sd s6, 240(sp)
+sd s8, 232(sp)
+sd s9, 224(sp)
+sd s10, 216(sp)
+lui a0, %hi(G.1)
+lui a1, %hi(G)
+lui s2, %hi(var)
+addi s2, s2, %lo(var)
+lbu a0, %lo(G.1)(a0)
+sd a0, 200(sp)
+lbu a0, 215(sp)
+sd a0, 192(sp)
+lw s5, %lo(G)(a1)
+lwu a0, 0(s2)
+lw a1, 4(s2)
+lwu a2, 8(s2)
+lw a3, 12(s2)
+lwu a4, 16(s2)
+lw a5, 20(s2)
+slli a1, a1, 32
+slli a3, a3, 32
+or a0, a1, a0
+sd a0, 184(sp)
+lwu a0, 24(s2)
+lw a1, 28(s2)
+lwu a6, 32(s2)
+lw a7, 36(s2)
+lwu t0, 40(s2)
+lw t1, 44(s2)
+or a2, a3, a2
+sd a2, 152(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 160(sp)
+slli a1, a1, 32
+or a0, a1, a0
+sd a0, 168(sp)
+slli a7, a7, 32
+or a0, a7, a6
+sd a0, 176(sp)
+slli t1, t1, 32
+lwu a0, 48(s2)
+lw a1, 52(s2)
+lwu a2, 56(s2)
+lw a3, 60(s2)
+lwu a4, 64(s2)
+lw a5, 68(s2)
+lwu a6, 72(s2)
+lw a7, 76(s2)
+or t0, t1, t0
+sd t0, 120(sp)
+slli a1, a1, 32
+or a0, a1, a0
+sd a0, 128(sp)
+slli a3, a3, 32
+or a2, a3, a2
+sd a2, 136(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 144(sp)
+slli a7, a7, 32
+lwu a0, 80(s2)
+lw a1, 84(s2)
+lwu a2, 88(s2)
+lw a3, 92(s2)
+lwu a4, 96(s2)
+lw a5, 100(s2)
+lwu t0, 104(s2)
+lw t1, 108(s2)
+or a6, a7, a6
+sd a6, 88(sp)
+slli a1, a1, 32
+or a0, a1, a0
+sd a0, 96(sp)
+slli a3, a3, 32
+or a2, a3, a2
+sd a2, 104(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 112(sp)
+slli t1, t1, 32
+lwu a0, 112(s2)
+lw a1, 116(s2)
+lwu a2, 120(s2)
+lw a3, 124(s2)
+lwu a4, 128(s2)
+lw a5, 132(s2)
+lwu a6, 136(s2)
+lw a7, 140(s2)
+or t0, t1, t0
+sd t0, 56(sp)
+slli a1, a1, 32
+or a0, a1, a0
+sd a0, 64(sp)
+slli a3, a3, 32
+or a2, a3, a2
+sd a2, 72(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 80(sp)
+slli a7, a7, 32
+lwu a0, 144(s2)
+lw a1, 148(s2)
+lwu a2, 152(s2)
+lw a3, 156(s2)
+lwu a4, 160(s2)
+lw a5, 164(s2)
+lwu t0, 168(s2)
+lw t1, 172(s2)
+or a6, a7, a6
+sd a6, 24(sp)
+slli a1, a1, 32
+or a0, a1, a0
 sd a0, 32(sp)
-ld a0, 16(a2)
-sd a0, 24(sp)
-ld a0, 24(a2)
-sd a0, 16(sp)
-ld a0, 32(a2)
-sd a0, 8(sp)
-ld t0, 40(a2)
-ld t1, 48(a2)
-ld t2, 56(a2)
-ld t3, 64(a2)
-ld t4, 72(a2)
-ld t5, 80(a2)
-ld t6, 88(a2)
-ld s0, 96(a2)
-ld s1, 104(a2)
-ld s2, 112(a2)
-ld s3, 120(a2)
-ld s4, 128(a2)
-ld s5, 136(a2)
-ld s6, 144(a2)
-ld s8, 152(a2)
-ld s9, 160(a2)
-ld s10, 168(a2)
-ld ra, 176(a2)
-ld a6, 184(a2)
-ld a5, 192(a2)
-ld a4, 200(a2)
-ld a3, 208(a2)
-ld a1, 216(a2)
-ld a0, 224(a2)
-ld a7, 232(a2)
-sd a7, 232(a2)
-sd a0, 224(a2)
-sd a1, 216(a2)
-sd a3, 208(a2)
-sd a4, 200(a2)
-sd a5, 192(a2)
-sd a6, 184(a2)
-sd ra, 176(a2)
-sd s10, 168(a2)
-sd s9, 160(a2)
-sd s8, 152(a2)
-sd s6, 144(a2)
-sd s5, 136(a2)
-sd s4, 128(a2)
-sd s3, 120(a2)
-sd s2, 112(a2)
-sd s1, 104(a2)
-sd s0, 96(a2)
-sd t6, 88(a2)
-sd t5, 80(a2)
-sd t4, 72(a2)
-sd t3, 64(a2)
-sd t2, 56(a2)
-sd t1, 48(a2)
-sd t0, 40(a2)
-ld a0, 8(sp)
-sd a0, 32(a2)
-ld a0, 16(sp)
-sd a0, 24(a2)
-ld a0, 24(sp)
-sd a0, 16(a2)
-ld a0, 32(sp)
-sd a0, 8(a2)
-ld a0, 40(sp)
-sd a0, 0(a2)
-ld a0, 56(sp)
-ld a1, 48(sp)
-sub a0, a0, a1
-lui a1, %hi(G.2)
-sb a0, %lo(G.2)(a1)
-sb zero, 71(sp)
-ld ra, 152(sp)
-ld s0, 144(sp)
-ld s1, 136(sp)
-ld s2, 128(sp)
-ld s3, 120(sp)
-ld s4, 112(sp)
-ld s5, 104(sp)
-ld s6, 96(sp)
-ld s8, 88(sp)
-ld s9, 80(sp)
-ld s10, 72(sp)
-addi sp, sp, 160
+slli a3, a3, 32
+or a2, a3, a2
+sd a2, 40(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 48(sp)
+slli t1, t1, 32
+lwu a0, 176(s2)
+lw a1, 180(s2)
+lwu a2, 184(s2)
+lw a3, 188(s2)
+lwu a4, 192(s2)
+lw a5, 196(s2)
+lwu a6, 200(s2)
+lw a7, 204(s2)
+or s0, t1, t0
+slli a1, a1, 32
+or a0, a1, a0
+sd a0, 0(sp)
+slli a3, a3, 32
+or a2, a3, a2
+sd a2, 8(sp)
+slli a5, a5, 32
+or a4, a5, a4
+sd a4, 16(sp)
+slli a7, a7, 32
+lwu a0, 208(s2)
+lw a1, 212(s2)
+lwu a2, 216(s2)
+lw a3, 220(s2)
+lwu a4, 224(s2)
+lw a5, 228(s2)
+lwu t0, 232(s2)
+lw t1, 236(s2)
+or s3, a7, a6
+slli a1, a1, 32
+or s10, a1, a0
+slli a3, a3, 32
+or s9, a3, a2
+slli a5, a5, 32
+or s8, a5, a4
+slli t1, t1, 32
+or s6, t1, t0
+lui s1, 522240
+addi s1, s1, -1
+mv a0, s5
+mv a1, s1
+call __eqsf2
+sext.w a0, a0
+snez s4, a0
+mv a0, s5
+mv a1, s1
+call __unordsf2
+ld a1, 200(sp)
+ld a2, 192(sp)
+sub a1, a2, a1
+ld a2, 184(sp)
+sw a2, 0(s2)
+sext.w a0, a0
+srli a2, a2, 32
+seqz a0, a0
+sw a2, 4(s2)
+and a0, s4, a0
+ld a2, 152(sp)
+sw a2, 8(s2)
+srli a2, a2, 32
+sw a2, 12(s2)
+ld a3, 160(sp)
+srli a2, a3, 32
+sw a3, 16(s2)
+sw a2, 20(s2)
+ld a2, 168(sp)
+sw a2, 24(s2)
+srli a2, a2, 32
+sw a2, 28(s2)
+ld a3, 176(sp)
+srli a2, a3, 32
+sw a3, 32(s2)
+sw a2, 36(s2)
+ld a2, 120(sp)
+sw a2, 40(s2)
+srli a2, a2, 32
+sw a2, 44(s2)
+ld a3, 128(sp)
+srli a2, a3, 32
+sw a3, 48(s2)
+sw a2, 52(s2)
+ld a2, 136(sp)
+sw a2, 56(s2)
+srli a2, a2, 32
+sw a2, 60(s2)
+ld a3, 144(sp)
+srli a2, a3, 32
+sw a3, 64(s2)
+sw a2, 68(s2)
+ld a3, 88(sp)
+srli a2, a3, 32
+sw a3, 72(s2)
+sw a2, 76(s2)
+ld a3, 96(sp)
+srli a2, a3, 32
+sw a3, 80(s2)
+sw a2, 84(s2)
+ld a3, 104(sp)
+srli a2, a3, 32
+sw a3, 88(s2)
+sw a2, 92(s2)
+ld a3, 112(sp)
+srli a2, a3, 32
+sw a3, 96(s2)
+sw a2, 100(s2)
+ld a3, 56(sp)
+srli a2, a3, 32
+sw a3, 104(s2)
+sw a2, 108(s2)
+ld a3, 64(sp)
+srli a2, a3, 32
+sw a3, 112(s2)
+sw a2, 116(s2)
+ld a3, 72(sp)
+srli a2, a3, 32
+sw a3, 120(s2)
+sw a2, 124(s2)
+ld a3, 80(sp)
+srli a2, a3, 32
+sw a3, 128(s2)
+sw a2, 132(s2)
+ld a3, 24(sp)
+srli a2, a3, 32
+sw a3, 136(s2)
+sw a2, 140(s2)
+ld a3, 32(sp)
+srli a2, a3, 32
+sw a3, 144(s2)
+sw a2, 148(s2)
+ld a3, 40(sp)
+srli a2, a3, 32
+sw a3, 152(s2)
+sw a2, 156(s2)
+ld a3, 48(sp)
+srli a2, a3, 32
+sw a3, 160(s2)
+sw a2, 164(s2)
+srli a2, s0, 32
+sw s0, 168(s2)
+sw a2, 172(s2)
+ld a3, 0(sp)
+srli a2, a3, 32
+sw a3, 176(s2)
+sw a2, 180(s2)
+ld a3, 8(sp)
+srli a2, a3, 32
+sw a3, 184(s2)
+sw a2, 188(s2)
+ld a3, 16(sp)
+srli a2, a3, 32
+sw a3, 192(s2)
+sw a2, 196(s2)
+srli a2, s3, 32
+sw s3, 200(s2)
+sw a2, 204(s2)
+srli a2, s10, 32
+sw s10, 208(s2)
+sw a2, 212(s2)
+srli a2, s9, 32
+sw s9, 216(s2)
+sw a2, 220(s2)
+srli a2, s8, 32
+sw s8, 224(s2)
+sw a2, 228(s2)
+srli a2, s6, 32
+sw s6, 232(s2)
+sw a2, 236(s2)
+sb a0, 215(sp)
+lui a0, %hi(G.2)
+sb a1, %lo(G.2)(a0)
+sb zero, 215(sp)
+ld ra, 296(sp)
+ld s0, 288(sp)
+ld s1, 280(sp)
+ld s2, 272(sp)
+ld s3, 264(sp)
+ld s4, 256(sp)
+ld s5, 248(sp)
+ld s6, 240(sp)
+ld s8, 232(sp)
+ld s9, 224(sp)
+ld s10, 216(sp)
+addi sp, sp, 304
 ret

Occurrences (1):

Generated 2026-10-15 08:05 UTC.